Fernando Silveira

Orcid: 0000-0003-1205-8595

According to our database1, Fernando Silveira authored at least 83 papers between 1996 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Low Output Voltage Closed-Loop Current Source for Neural Stimulation.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

Wirelessly Programmable Class-E GaN-Based 13.56 MHz Transmitter for Wireless Power Transfer.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

2023
Trends in Volumetric-Energy Efficiency of Implantable Neurostimulators: A Review From a Circuits and Systems Perspective.
IEEE Trans. Biomed. Circuits Syst., February, 2023

Active inductors modelling and trade-offs reexamined.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

Pico-Ampere Current Biasing Platform for on-chip Tuning of Analog Blocks.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

Thermal Energy Harvesting to Power a Battery-Less Node of a Wireless Sensor Network.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

Capacitances in Compact 7-Parameter Model for Analog Design in Nanoscale Process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Ratio Based Analog Design and Transistor Distortion Characteristics.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A Compact Lithium-Ion Battery Charger for Low-Power Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Limits for Low Supply Voltage Operation of a 5 GHz VCO to Drive a 4-Path Mixer.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Near threshold pulse transit time processor for central blood pressure estimation.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

2021
Guest Editorial: Special Issue Based on the 12th Edition of the Latin American Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Minimum Supply Voltage of 2.45 GHz LC Oscillator in 28 nm FD-SOI Process.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

2020
Ultra-Low-Voltage CMOS Crystal Oscillators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Normalized Nonlinear Semiempirical MOST Model Used in Monolithic RF Class A-to-C PAs.
Circuits Syst. Signal Process., 2020

2019
Enhancing Parasitic Interference Directional Antennas with Multiple Director Elements.
Wirel. Commun. Mob. Comput., 2019

Gain, Signal-to-Noise Ratio and Power Optimization of Envelope Detector for Ultra-Low-Power Wake-Up Receiver.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Variability-Aware Design Method for a Constant Inversion Level Bias Current Generator.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Optimal asymmetrical back plane biasing for energy efficient digital circuits in 28 nm UTBB FD-SOI.
Integr., 2019

Enhanced ICMR amplifier for high CMRR biopotential recordings.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

2018
Current-Efficient Preamplifier Architecture for CMRR Sensitive Neural Recording Applications.
IEEE Trans. Biomed. Circuits Syst., 2018

Performance-reliability trade-offs in short range RF power amplifier design.
Microelectron. Reliab., 2018

Ultra Low Power Tunable Filter for a Low Phase Shift on Electrocardiogram QRS-Complex Acquisition.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

RF CMOS all inversion region design based on gm/ID: the non-linear case of an envelope detector.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

All-inversion region gm/ID methodology for RF circuits in FinFET technologies.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

Gate drive losses reduction in switched-capacitor DC-DC converters.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Antenna Characterization without Using Anechoic Chambers or TEM Cells.
Proceedings of the 10th Latin America Networking Conference, 2018

2017
Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Asymmetrical length biasing for energy efficient digital circuits.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

Reconfigurable multiple-gain active-rectifier for maximum efficiency point tracking in WPT.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

Settling time-based design of a fully differential OTA for a SC integrator.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

Low group delay signal conditioning for wearable central blood pressure monitoring device.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017

2016
General Top/Bottom-Plate Charge Recycling Technique for Integrated Switched Capacitor DC-DC Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Minimum Operating Voltage Due to Intrinsic Noise in Subthreshold Digital Logic in Nanoscale CMOS.
J. Low Power Electron., 2016

Relaxing the maximum dc input amplitude vs. consumption trade-off in differential-input band-pass biquad filters.
Int. J. Circuit Theory Appl., 2016

Pushing minimum energy limits by optimal asymmetrical back plane biasing in 28 nm UTBB FD-SOI.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Matching networks for maximum efficiency in two and three coil wireless power transfer systems.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Uplink wireless transmission overview in bi-directional VLC systems.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
Optimum design of a banked memory with power management for wireless sensor networks.
Wirel. Networks, 2015

Variability modeling in near-threshold CMOS digital circuits.
Microelectron. J., 2015

Sequential Relevance Maximization with Binary Feedback.
CoRR, 2015

Constraints and design approaches in analog ICs forlmplantable medical devices.
Proceedings of the VLSI Design, Automation and Test, 2015

Analysis and Design of a MOS RF Envelope Detector in All Inversion Regions.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

High slew-rate OTA with low quiescent current based on non-linear current mirror.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Design optimization of a CMOS RF detector.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Average Power Consumption Breakdown of Wireless Sensor Network Nodes Using IPv6 over LLNs.
Proceedings of the 2015 International Conference on Distributed Computing in Sensor Systems, 2015

2014
A series-parallel switched capacitor step-up DC-DC converter and its gate-control circuits for over the supply rail switches.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Integrated programmable analog front-end architecture for physiological signal acquisition.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014

2013
Ultra low power pulse generator based on a ring oscillator with direct path current avoidance.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Low-Power Processors Require Effective Memory Partitioning.
Proceedings of the Embedded Systems: Design, Analysis and Verification, 2013

Predicting audience responses to movie content from electro-dermal activity signals.
Proceedings of the 2013 ACM International Joint Conference on Pervasive and Ubiquitous Computing, 2013

Towards user identification in the home from appliance usage patterns.
Proceedings of the 2013 ACM International Joint Conference on Pervasive and Ubiquitous Computing, 2013

A New Memory Banking System for Energy-Efficient Wireless Sensor Networks.
Proceedings of the IEEE International Conference on Distributed Computing in Sensor Systems, 2013

On the Fly User's Emotion Capture.
Proceedings of the 2013 Humaine Association Conference on Affective Computing and Intelligent Interaction, 2013

2012
Predicting packet loss statistics with hidden Markov models for FEC control.
Comput. Networks, 2012

The Stanford/Technicolor/Fraunhofer HHI Video Semantic Indexing System.
Proceedings of the 2012 TREC Video Retrieval Evaluation, 2012

Modular architecture for Ultra Low Power Switched-Capacitor DC-DC Converters.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011
Variability-Speed-Consumption Trade-off in Near Threshold Operation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011

High CMRR power efficient neural recording amplifier architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Detecting traffic anomalies using an equilibrium property.
Proceedings of the SIGMETRICS 2010, 2010

ASTUTE: detecting a different class of traffic anomalies.
Proceedings of the ACM SIGCOMM 2010 Conference on Applications, 2010

A disruption-tolerant architecture for secure and efficient disaster response communications.
Proceedings of the 7th Proceedings of the International Conference on Information Systems for Crisis Response and Management, 2010

Efficiency based design flow for fully-integrated class C RF power amplifiers in nanometric CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

URCA: Pulling out Anomalies by their Root Causes.
Proceedings of the INFOCOM 2010. 29th IEEE International Conference on Computer Communications, 2010

A fully differential monolithic 2.4GHZ PA for IEEE 802.15.4 based on efficiency design flow.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Phase noise - consumption trade-off in low power RF-LC-VCO design in micro and nanometric technologies.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Uncovering Artifacts of Flow Measurement Tools.
Proceedings of the Passive and Active Network Measurement, 10th International Conference, 2009

2008
A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

CMOS op-amp power optimization in all regions of inversion using geometric programming.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

2007
Predicting packet loss statistics with hidden Markov models.
SIGMETRICS Perform. Evaluation Rev., 2007

Detectability of Traffic Anomalies in Two Adjacent Networks.
Proceedings of the Passive and Active Network Measurement, 8th Internatinoal Conference, 2007

Challenging the supremacy of traffic matrices in anomaly detection.
Proceedings of the 7th ACM SIGCOMM Internet Measurement Conference, 2007

Identifying statistically anomalous regions in time series of network traffic.
Proceedings of the 2007 ACM Conference on Emerging Network Experiment and Technology, 2007

2006
Modeling the short-term dynamics of packet losses.
SIGMETRICS Perform. Evaluation Rev., 2006

Bias circuit design for low-voltage cascode transistors.
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

A tool for design exploration and power optimization of CMOS RF circuits blocks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2003
Design of a Reusable Rail-to-Rail Operational Amplifier.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

MOSFET mismatch in weak/moderate inversion: model needs and implications for analog design.
Proceedings of the ESSCIRC 2003, 2003

2002
Operational Amplifier Power Optimization for a Given Total (Slewing plus Linear) Settling Time.
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

Experiences on Analog Circuit Technology Migration and Reuse.
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

A 110 nA pacemaker sensing channel in CMOS on silicon-on-insulator.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2000
Analysis and Design of a Family of Low-Power Class AB Operational Amplifiers.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1996
A g<sub>m</sub>/I<sub>D</sub> based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA.
IEEE J. Solid State Circuits, 1996


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