Fernando Antonio Pinto Barúqui

Orcid: 0000-0002-2060-5168

According to our database1, Fernando Antonio Pinto Barúqui authored at least 19 papers between 1996 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Layout Design of an Asynchronous Time-Based Image Sensor with Shared DVS Module.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

2023
Voltage Regulator with Ellipsoidal Transistors.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

2017
A temperature-aware analysis of latched comparators for smart vehicle applications.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

2016
Focal-plane image encoder with cascode current mirrors and increased vector quantization bit rate.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

High-linearity zero-voltage switching current memory cell for measurement applications.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2015
Bulk-tuned Gm-C filter using current cancellation.
Microelectron. J., 2015

2011
A Fully Differential CMOS Voltage Buffer for Continuous- and Discrete-Time Applications.
Circuits Syst. Signal Process., 2011

2009
Switched-capacitor decimation filter design using time-multiplexing and polyphase decomposition of transfer functions with low denominator orders.
Microelectron. J., 2009

A New Approach for the Design of CMOS Voltage Buffers for Switched-capacitor and gm-C Filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
Improving sensitivity of direct-form switched-capacitor filters by coinciding pole-zero pairs.
IET Circuits Devices Syst., 2008

Direct-form SC filters with low frequency response sensitivity to the transfer function coefficients.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
A CMOS AM demodulator for instrumentation applications.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

2006
Linearly Tunable CMOS OTA With Constant Dynamic Range Using Source-Degenerated Current Mirrors.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005
IC design of an analog tunable crossover network.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003
Tunable analog loudspeaker crossover network.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
A 48-16-MHz CMOS SC decimation filter.
IEEE J. Solid State Circuits, 2002

Analog Decimator IC in Direct-form Polyphase Structure.
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

1998
Efficient IC Design of SC Decimation Filters.
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998

1996
Efficient IIR switched-capacitor decimators and interpolators.
Proceedings of the 8th European Signal Processing Conference, 1996


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