Ferdinando Bedeschi

According to our database1, Ferdinando Bedeschi authored at least 12 papers between 2004 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology.
IEEE J. Solid State Circuits, 2011

2010
A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A Bipolar-Selected Phase Change Memory Featuring Multi-Level Cell Storage.
IEEE J. Solid State Circuits, 2009

2008

2007
Staircase-down SET programming approach for phase-change memories.
Microelectron. J., 2007

2006
Set-sweep programming pulse for phase-change memories.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A low-ripple voltage tripler.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
4-Mb MOSFET-selected μtrench phase-change memory experimental chip.
IEEE J. Solid State Circuits, 2005

SET and RESET pulse characterization in BJT-selected phase-change memories.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A fully symmetrical sense amplifier for non-volatile memories.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A low-power low-voltage MOSFET-only voltage reference.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004



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