Ferad Zyulkyarov

Orcid: 0000-0003-3139-7349

According to our database1, Ferad Zyulkyarov authored at least 19 papers between 2003 and 2021.

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Bibliography

2021

2019
Evaluation of a Rack-Scale Disaggregated Memory Prototype for Cloud Data Centers.
Proceedings of the 30th International Workshop on Rapid System Prototyping, 2019

2018
Unified fault-tolerance framework for hybrid task-parallel message-passing applications.
Int. J. High Perform. Comput. Appl., 2018

dReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Disaggregated Computing. An Evaluation of Current Trends for Datacentres.
Proceedings of the International Conference on Computational Science, 2017

Diluting the Scalability Boundaries: Exploring the Use of Disaggregated Architectures for High-Level Network Data Analysis.
Proceedings of the 19th IEEE International Conference on High Performance Computing and Communications; 15th IEEE International Conference on Smart City; 3rd IEEE International Conference on Data Science and Systems, 2017

Designing and Modelling Selective Replication for Fault-tolerant HPC Applications.
Proceedings of the 17th IEEE/ACM International Symposium on Cluster, 2017

2016
Unprotected computing: a large-scale study of DRAM raw error rate on a supercomputer.
Proceedings of the International Conference for High Performance Computing, 2016

A Runtime Heuristic to Selectively Replicate Tasks for Application-Specific Reliability Targets.
Proceedings of the 2016 IEEE International Conference on Cluster Computing, 2016

2015
Marriage Between Coordinated and Uncoordinated Checkpointing for the Exascale Era.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

2012
Profiling and Optimizing Transactional Memory Applications.
Int. J. Parallel Program., 2012

TagTM - accelerating STMs with hardware tags for fast meta-data access.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Programming, debugging, profiling and optimizing transactional memory programs.
PhD thesis, 2011

2010
Debugging programs that use atomic blocks and transactional memory.
Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2010

Discovering and understanding performance bottlenecks in transactional applications.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009
Atomic quake: using transactional memory in an interactive multiplayer game server.
Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2009

QuakeTM: parallelizing a complex sequential application using transactional memory.
Proceedings of the 23rd international conference on Supercomputing, 2009

2008
WormBench: a configurable workload for evaluating transactional memory systems.
Proceedings of the 9th workshop on MEmory performance, 2008

2003
Comparison of New Simple Weighting Functions for Web Documents against Existing Methods.
Proceedings of the Computer and Information Sciences, 2003


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