Feng-Hsiang Lo

According to our database, Feng-Hsiang Lo authored at least 4 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Scalable Embedded Multi-Die Active Bridge (S-EMAB) Chips with Integrated LDOs for Low-Cost Programmable 2.5D/3.5D Packaging Technology.

Wei Lu, Jie Zhang, Yi-Hui Wei, Hsu-Ming Hsiao, Sih-Han Li, Chao-Kai Hsu, Chih-Cheng Hsiao, Feng-Hsiang Lo, Shyh-Shyuan Sheu, Chin-Hung Wang, Wei-Chung Lo, Shih-Chieh Chang, Hung-Ming Chen, Kuan-Neng Chen, Po-Tsang Huang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2010

Real-time multi-view rendering architecture for autostereoscopic displays.

Hsin-Jung Chen, Feng-Hsiang Lo, Fu-Chiang Jan, Sheng-Dong Wu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2006

The Design of Analog Front-End Circuitry for 1X HD-DVD PRML Read Channel.

Sheng-Jang Lin, I-Shun Chen, Bo-Wei Chen, Feng-Hsiang Lo

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

High Efficient Multi-Level Run-Length-Limited Modulation with State Control Symbol.

Sun-How Jiang, Kai-Che Liu, Feng-Hsiang Lo, Chang-Po Ma

Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006