Felipe Viel

According to our database, Felipe Viel authored at least 15 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A real-time SVM-based hardware accelerator for hyperspectral images classification in FPGA.

Lucas Amilton Martins, Felipe Viel, Laio Oriel Seman, Eduardo Augusto Bezerra, César Albenes Zeferino

Microprocess. Microsystems, 2024

TinyML Applied in Hyperspectral Image Classification on COTS Microcontroller.

João Victor Santos Hütner, Felipe Viel, Cesar A. Zeferino, Eduardo Augusto Bezerra

Proceedings of the XIV Brazilian Symposium on Computing Systems Engineering, 2024

Special Session: Reliability and Performance Evaluation of a RISC-V Vector Extension Unit for Vector Multiplication.

Carolina Imianosky, Douglas A. dos Santos, Douglas R. Melo, Felipe Viel, Luigi Dilillo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

2023

Payload-XL: A Platform for the In-Orbit Validation of the BRAVE FPGA.

Felipe Viel, Kleber R. Gouveia, Edilberto Costa, Márcio Oliveira, Miguel Boing, André Martins Pio de Mattos, Gabriel Mariano Marcelino, David Merodio Codinachs, Laio Oriel Seman, Eduardo Augusto Bezerra

IEEE Embed. Syst. Lett., June, 2023

Hyperspectral Image Classification: An Analysis Employing CNN, LSTM, Transformer, and Attention Mechanism.

Felipe Viel, Renato Cotrim Maciel, Laio Oriel Seman, César Albenes Zeferino, Eduardo Augusto Bezerra, Valderi Reis Quietinho Leithardt

IEEE Access, 2023

Implementation and Reliability Evaluation of a RISC-V Vector Extension Unit.

Carolina Imianosky, Douglas A. dos Santos, Douglas R. Melo, Felipe Viel, Luigi Dilillo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression.

Wesley Grignani, Douglas A. dos Santos, Luigi Dilillo, Felipe Viel, Douglas R. Melo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2021

A Hardware Accelerator for Onboard Spatial Resolution Enhancement of Hyperspectral Images.

Felipe Viel, Wemerson Delcio Parreira, Altamiro Amadeu Susin, César Albenes Zeferino

IEEE Geosci. Remote. Sens. Lett., 2021

2020

An Efficient Interface for the Integration of IoT Devices with Smart Grids.

Felipe Viel, Luis Augusto Silva, Valderi Reis Quietinho Leithardt, Juan Francisco De Paz Santana, Raimundo Celeste Ghizoni Teive, César Albenes Zeferino

Sensors, 2020

Evaluating the CCSDS 123 Compressor Running on RISC-V and ARM Architectures.

Carolina Imianosky, Paulo R. O. Valim, Cesar A. Zeferino, Felipe Viel

Proceedings of the X Brazilian Symposium on Computing Systems Engineering, 2020

A Hardware Accelerator for the Segmentation of Hyperspectral Images.

Arthur Passos, Felipe Viel, Cesar A. Zeferino

Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

2019

A Solution for Controlling and Managing User Profiles based on Data Privacy for IoT Applications.

Valderi R. Q. Leithardt, Douglas A. dos Santos, Luis Augusto Silva, Felipe Viel, Cesar A. Zeferino, Jorge Sá Silva

CoRR, 2019

A custom processor for an FPGA-based platform for automatic license plate recognition.

Guilherme A. M. Sborz, Guilherme A. Pohl, Felipe Viel, Cesar A. Zeferino

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

An SVM-based hardware accelerator for onboard classification of hyperspectral images.

Lucas Amilton Martins, Guilherme A. M. Sborz, Felipe Viel, Cesar A. Zeferino

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

2018

A Hardware Accelerator for Anisotropic Diffusion Filtering in FPGA.

Guilherme F. Weidle, Felipe Viel, Douglas Rossi de Melo, Cesar A. Zeferino

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018