Feiran Lei
Orcid: 0000-0003-4158-1457
According to our database1,
Feiran Lei
authored at least 6 papers
between 2012 and 2017.
Collaborative distances:
Collaborative distances:
Timeline
2012
2013
2014
2015
2016
2017
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
A low noise, inductor-less, integer-N RF synthesizer using phase-locked loop with reference injection (PLL-RI).
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
2013
A preliminary study of the Coherent Phase Synchronous Oscillator (CPSO) for Phase-Locked Loop (PLL) applications.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
2012
Adaptive slope and threshold companding technique for PAPR reduction in OFDM systems.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
A RF/DC current-mode detector for BiST and digital calibration of current-driven mixers.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012