Federico Pepe
Orcid: 0000-0002-9555-5775
According to our database1,
Federico Pepe
authored at least 14 papers
between 2012 and 2020.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2020
Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication.
IEEE J. Solid State Circuits, 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 22.5-27.7-GHz Fast-Lock Bang-Bang Digital PLL in 28-nm CMOS for Millimeter-Wave Communication With 220-fs RMS Jitter.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
40GHz Frequency Tripler with High Fundamental and Harmonics Rejection in 55nm SiGe-BiCMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
2014
Analysis and minimization of flicker noise up-conversion in radio frequency LC-tuned oscillators.
PhD thesis, 2014
2013
Suppression of Flicker Noise Up-Conversion in a 65-nm CMOS VCO in the 3.0-to-3.6 GHz Band.
IEEE J. Solid State Circuits, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
Flicker Noise Up-Conversion due to Harmonic Distortion in Van der Pol CMOS Oscillators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
A fast and accurate simulation method of impulse sensitivity function in oscillators.
Proceedings of the 2012 Proceedings of the 35th International Convention, 2012