Fatemeh Shirinzadeh

According to our database, Fatemeh Shirinzadeh authored at least 4 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures.

Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta, Rolf Drechsler

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

A Multi-Objective Evolutionary Approach for Test Network Design.

Payam Habiby, Fatemeh Shirinzadeh, Sebastian Huhn, Rolf Drechsler

Proceedings of the IEEE European Test Symposium, 2024

2023

Verification of In-Memory Logic Design using ReRAM Crossbars.

Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

2020

Optimal design of adaptive and proportional integral derivative controllers using a novel hybrid particle swarm optimization algorithm.

Elham Yazdani Bejarbaneh, Arash Hosseinian Ahangarnejad, Ahmad Bagheri, Behnam Yazdani Bejarbaneh, Binh Thai Pham, Salinda Buyamin, Fatemeh Shirinzadeh

Trans. Inst. Meas. Control, 2020