Fatemeh Serajeh-hassani
Orcid: 0009-0008-4562-506X
According to our database1,
Fatemeh Serajeh-hassani
authored at least 3 papers
between 2019 and 2024.
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Bibliography
2024
ACM Trans. Design Autom. Electr. Syst., May, 2024
2023
Designing a one-bit coplanar QCA ALU using a novel robust area-efficient three-input majority gate design.
J. Supercomput., November, 2023
2019
Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019