Farshid Raissi
According to our database1,
Farshid Raissi
authored at least 16 papers
between 2005 and 2015.
Collaborative distances:
Collaborative distances:
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Bibliography
2015
Coulomb blockade in PtSi/porous Si Schottky barrier as a two-dimensional multi-tunnelling junction.
IET Circuits Devices Syst., 2015
2014
Design and Analysis of a High Force, Low Voltage and High Flow Rate Electro-Thermal Micropump.
Micromachines, 2014
2011
Int. J. Circuit Theory Appl., 2011
2010
Efficient Hybrid CMOS-Nano Circuit Design for Spiking Neurons and Memristive Synapses with STDP.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
A novel ultra low-energy sub-threshold inverter based on nanoscale Field Effect Diode.
IEICE Electron. Express, 2010
Low-power and high-performance Automatic Gain Control systems based on nanoscale Field Effect Diode and SOI-MOSFET.
IEICE Electron. Express, 2010
2009
Low-power variable gain amplifier with wide UGBW based on nanoscale Field Effect Diode.
IEICE Electron. Express, 2009
IEICE Electron. Express, 2009
Implementation of biologically plausible spiking neural network models on the memristor crossbar-based CMOS/nano circuits.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
IEICE Electron. Express, 2008
A novel topology in reversed nested miller compensation using dual-active capacitance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2006
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006
2005
J. Circuits Syst. Comput., 2005
Enhancing Performance and Saving Energy in CMOS DCVSL Gates by Using a New Transistor Sizing Algorithm.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005