Farshad Pesaran
According to our database1,
Farshad Pesaran
authored at least 7 papers
between 2021 and 2024.
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Bibliography
2024
IEEE Embed. Syst. Lett., March, 2024
Realization of a high-efficient GDI-based 4:2 compressor for sum of absolute difference detection in image and signal processing.
Comput. Electr. Eng., 2024
2023
High-efficient reversible full adder realized by dynamic threshold-based gate diffusion input logics.
Microelectron. J., December, 2023
Imprecise Subtractor Using a New Efficient Approximate-Based Gate Diffusion Input Full Adder for Bioimages Processing.
Comput. Electr. Eng., May, 2023
Efficient GDI-based approximate subtractors for change detection in bio-image processing applications.
Microelectron. J., 2023
A high-efficient imprecise discrete cosine transform block based on a novel full adder and Wallace multiplier for bioimages compression.
Int. J. Circuit Theory Appl., 2023
2021
An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications.
Microelectron. J., 2021