Faris S. Alghareb
Orcid: 0000-0001-6564-4008
According to our database1,
Faris S. Alghareb
authored at least 4 papers
between 2016 and 2019.
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Bibliography
2019
Design and Evaluation of DNU-Tolerant Registers for Resilient Architectural State Storage.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
2018
Designing and Evaluating Redundancy-Based Soft-Error Masking on a Continuum of Energy versus Robustness.
IEEE Trans. Sustain. Comput., 2018
2017
Energy and Delay Tradeoffs of Soft-Error Masking for 16-nm FinFET Logic Paths: Survey and Impact of Process Variation in the Near-Threshold Region.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
2016
Soft Error Effect Tolerant Temporal Self-Voting Checkers: Energy vs. Resilience Tradeoffs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016