Farhad Alibeygi Parsan

According to our database, Farhad Alibeygi Parsan authored at least 8 papers between 2008 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

Design for Testability of Sleep Convention Logic.

Farhad Alibeygi Parsan, Scott C. Smith, Waleed K. Al-Assadi

IEEE Trans. Very Large Scale Integr. Syst., 2016

2014

Gate Mapping Automation for Asynchronous NULL Convention Logic Circuits.

Farhad Alibeygi Parsan, Waleed K. Al-Assadi, Scott C. Smith

IEEE Trans. Very Large Scale Integr. Syst., 2014

SCL design of a pipelined 8051 ALU.

Farhad Alibeygi Parsan, J. Zhao, Scott C. Smith

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2012

CMOS Implementation of Threshold Gates with Hysteresis.

Farhad Alibeygi Parsan, Scott C. Smith

Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012

CMOS implementation of static threshold gates with hysteresis: A new approach.

Farhad Alibeygi Parsan, Scott C. Smith

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

CMOS implementation comparison of NCL gates.

Farhad Alibeygi Parsan, Scott C. Smith

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2009

Investigating the linearity of MOSFET-only switched-capacitor DeltaSigma modulators under low-voltage condition.

Farhad Alibeygi Parsan, Ahmad Ayatollahi, Adib Abrishamifar

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

A comparator-based switched-capacitor integrator using a new charge control circuit.

Farhad Alibeygi Parsan, Ahmad Ayatollahi

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008