Fares Elsabbagh

According to our database, Fares Elsabbagh authored at least 5 papers between 2020 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Accelerating RTL Simulation with Hardware-Software Co-Design.

Fares Elsabbagh, Shabnam Sheikhha, Victor A. Ying, Quan M. Nguyen, Joel S. Emer, Daniel Sánchez

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

2021

Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch.

Blaise Tine, Fares Elsabbagh, Krishna Praveen Yalamarthy, Hyesoon Kim

CoRR, 2021

Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics.

Blaise Tine, Krishna Praveen Yalamarthy, Fares Elsabbagh, Hyesoon Kim

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

2020

Vortex: OpenCL Compatible RISC-V GPGPU.

Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim

CoRR, 2020

Cash: A Single-Source Hardware-Software Codesign Framework for Rapid Prototyping.

Blaise Tine, Fares Elsabbagh, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020