Farah Naz Taher

According to our database, Farah Naz Taher authored at least 7 papers between 2015 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Learning-Based Diversity Estimation: Leveraging the Power of High-Level Synthesis to Mitigate Common-Mode Failure.

Farah Naz Taher, Anjana Balachandran, Benjamin Carrión Schäfer

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

Exploring Design Trade-offs in Fault-Tolerant Behavioral Hardware Accelerators.

Zhiqi Zhu, Farah Naz Taher, Benjamin Carrión Schäfer

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Efficient Hardware Acceleration for Design Diversity Calculation to Mitigate Common Mode Failures.

Maheshwaran Ramesh Babu, Farah Naz Taher, Anjana Balachandran, Benjamin Carrión Schäfer

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Common-Mode Failure Mitigation: Increasing Diversity through High-Level Synthesis.

Farah Naz Taher, Matthew Joslin, Anjana Balachandran, Zhiqi Zhu, Benjamin Carrión Schäfer

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis.

Farah Naz Taher, Mostafa Kishani, Benjamin Carrión Schäfer

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

A machine learning based hard fault recuperation model for approximate hardware accelerators.

Farah Naz Taher, Joseph Callenes-Sloan, Benjamin Carrión Schäfer

Proceedings of the 55th Annual Design Automation Conference, 2018

2015

Hardware Fault Compensation Using Discriminative Learning.

Farah Naz Taher, Joseph Callenes-Sloan

Proceedings of the 21st IEEE Pacific Rim International Symposium on Dependable Computing, 2015