Fang-Shi Lai

According to our database, Fang-Shi Lai authored at least 4 papers between 1991 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

On-Chip Voltage Down Converter to Improve SRAM Read/Write Margin and Static Power for Sub-Nano CMOS Technology.

Fang-Shi Lai, Chia-Fu Lee

IEEE J. Solid State Circuits, 2007

2005

Device trends and implications on circuit design in advanced CMOS technologies.

Carlos H. Diaz, K. H. Fung, Ying-Keung Leung, Chung-Cheng Wu, Chih-Ping Chao, G. J. Chern, Wesley L. Lin, Chien-Ming Lee, Fang-Shi Lai, Mi-Chang Chang, Yuan-Chen Sun

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

1997

Design and implementation of differential cascode voltage switch with pass-gate (DCVSPG) logic for high-performance digital systems.

Fang-Shi Lai, Wei Hwang

IEEE J. Solid State Circuits, 1997

1991

A Hybrid Number System Processor with Geometric and Complex Arithmetic Capabilities.

Fang-Shi Lai, Ching-Farn Eric Wu

IEEE Trans. Computers, 1991