Fan Chen
Orcid: 0000-0001-7928-8331Affiliations:
- Indiana University Bloomington, IN, USA
- Duke University, Department of Electrical and Computer Engineering, Durham, NC, USA (PhD 2020)
According to our database1,
Fan Chen
authored at least 45 papers
between 2018 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
CoRR, 2024
IoTCO2: Assessing the End-To-End Carbon Footprint of Internet-of-Things-Enabled Deep Learning.
CoRR, 2024
Proceedings of the International Joint Conference on Neural Networks, 2024
Proceedings of the Twelfth International Conference on Learning Representations, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Special Session: End-To-End Carbon Footprint Assessment and Modeling of Deep Learning.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2024
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
IEEE Trans. Computers, February, 2023
CoRR, 2023
ReFloat: Low-Cost Floating-Point Processing in ReRAM for Accelerating Iterative Linear Solvers.
Proceedings of the International Conference for High Performance Computing, 2023
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023
QDoor: Exploiting Approximate Synthesis for Backdoor Attacks in Quantum Neural Networks.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023
PriML: An Electro-Optical Accelerator for Private Machine Learning on Encrypted Data.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
IQGAN: Robust Quantum Generative Adversarial Network for Image Synthesis On NISQ Devices.
Proceedings of the IEEE International Conference on Acoustics, 2023
Proceedings of the IEEE International Conference on Acoustics, 2023
2022
Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022
QMLP: An Error-Tolerant Nonlinear Quantum MLP Architecture using Parameterized Two-Qubit Gates.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
MOCCA: A Process Variation Tolerant Systolic DNN Accelerator using CNFETs in Monolithic 3D.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
2021
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021
PUFFIN: An Efficient DNN Training Accelerator for Direct Feedback Alignment in FeFET.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Rerec: In-ReRAM Acceleration with Access-Aware Mapping for Personalized Recommendation.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Marvel: A Vertical Resistive Accelerator for Low-Power Deep Learning Inference in Monolithic 3D.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
PARC: A Processing-in-CAM Architecture for Genomic Long Read Pairwise Alignment using ReRAM.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
Exploring Bit-Slice Sparsity in Deep Neural Networks for Efficient ReRAM-Based Deployment.
Proceedings of the Fifth Workshop on Energy Efficient Machine Learning and Cognitive Computing, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Deep Learning for Vertex Reconstruction of Neutrino-nucleus Interaction Events with Combined Energy and Time Data.
Proceedings of the IEEE International Conference on Acoustics, 2019
Efficient Process-in-Memory Architecture Design for Unsupervised GAN-based Deep Learning using ReRAM.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
ZARA: A Novel Zero-free Dataflow Accelerator for Generative Adversarial Networks in 3D ReRAM.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Taming extreme heterogeneity via machine learning based design of autonomous manycore systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Exploring the opportunity of implementing neuromorphic computing systems with spintronic devices.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018