Fahimeh Yazdanpanah

According to our database1, Fahimeh Yazdanpanah authored at least 17 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
An approach for low-power heterogeneous parallel implementation of ALC-PSO algorithm using OmpSs and CUDA.
Parallel Comput., 2024

2023
A low-power WNoC transceiver with a novel energy consumption management scheme for dependable IoT systems.
J. Parallel Distributed Comput., February, 2023

A two-level network-on-chip architecture with multicast support.
J. Parallel Distributed Comput., February, 2023

2022
A systematic analysis of power saving techniques for wireless network-on-chip architectures.
J. Syst. Archit., 2022

2021
A high-performance FPGA-based multicrossbar prioritized network-on-chip.
Concurr. Comput. Pract. Exp., 2021

2019
A QoS-aware congestion control mechanism for wireless multimedia sensor networks.
Wirel. Networks, 2019

An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chip.
J. Supercomput., 2019

H<sup>2</sup>WNoC: A honeycomb hardware-efficient wireless network-on-chip architecture.
Nano Commun. Networks, 2019

EELCM: An Energy Efficient Load-Based Clustering Method for Wireless Mobile Sensor Networks.
Mob. Networks Appl., 2019

2018
An Energy Efficient Autonomous Method for Coverage Optimization in Wireless Multimedia Sensor Networks.
Wirel. Pers. Commun., 2018

HoneyWiN: Novel Honeycomb-Based Wireless NoC Architecture in Many-Core Era.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
An approach for analyzing auto-vectorization potential of emerging workloads.
Microprocess. Microsystems, 2017

2015
Design space exploration of hardware task superscalar architecture.
J. Supercomput., 2015

Picos: A hardware runtime architecture support for OmpSs.
Future Gener. Comput. Syst., 2015

2014
Hardware design of task superscalar architecture.
PhD thesis, 2014

Hybrid Dataflow/von-Neumann Architectures.
IEEE Trans. Parallel Distributed Syst., 2014

2013
Analysis of the Task Superscalar Architecture Hardware Design.
Proceedings of the International Conference on Computational Science, 2013


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