Fadia Nemer

According to our database1, Fadia Nemer authored at least 3 papers between 2006 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2008
Inter-task WCET computation for a-way instruction caches.
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008

2007
Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis.
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

2006
PapaBench: a Free Real-Time Benchmark.
Proceedings of the 6th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2006


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