Fabrice Monteiro
According to our database1,
Fabrice Monteiro
authored at least 51 papers
between 1998 and 2022.
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Bibliography
2022
Energy storage management for building critical loads using home to vehicle and vehicle to home strategy.
Proceedings of the International Conference on Microelectronics, 2022
2021
J. Ubiquitous Syst. Pervasive Networks, 2021
Improved many-to-one architecture based on discrete wavelet packet transform for industrial IoT applications using channel coding.
J. Ambient Intell. Humaniz. Comput., 2021
Modeling and Validation of the Hospital's Ambulatory and Inpatients Operations Using a Non-Homogenous Discrete Time Markovian Chains.
IEEE Access, 2021
2020
Proceedings of the 11th International Conference on Ambient Systems, 2020
2019
Discrete Wavelet Packet Transform-Based Industrial Digital Wireless Communication Systems.
Inf., 2019
2017
Proceedings of the 29th International Conference on Microelectronics, 2017
A ultra high speed and configurable Inverse Discrete Wavelet Packet Transform architecture.
Proceedings of the 29th International Conference on Microelectronics, 2017
Proceedings of the 29th International Conference on Microelectronics, 2017
Modelling industrial manufacturing problem using ILP solver : Case of production analysis.
Proceedings of the 29th International Conference on Microelectronics, 2017
2016
A novel ultra high speed and configurable discrete wavelet packet transform architecture.
Proceedings of the 28th International Conference on Microelectronics, 2016
2015
Proceedings of the 27th International Conference on Microelectronics, 2015
Bearing fault diagnosis based on Alpha-stable distribution feature extraction and wSVM classifier.
Proceedings of the 27th International Conference on Microelectronics, 2015
Proceedings of the 27th International Conference on Microelectronics, 2015
Proceedings of the 27th International Conference on Microelectronics, 2015
2014
Bearing fault diagnosis based on Alpha-stable distribution feature extraction and SVM classifier.
Proceedings of the 4th International Conference on Multimedia Computing and Systems, 2014
Configurable and high-throughput architectures for Quasi-cyclic low-density parity-check codes.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2013
A high throughput configurable parallel encoder architecture for Quasi-Cyclic Low-Density Parity-Check Codes.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013
2012
J. Electr. Comput. Eng., 2012
2011
Int. J. Reconfigurable Comput., 2011
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
Strategic placement of reliable routers for the optimization of dependable dynamic NoC.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
2010
A Self-Checking HW Journal for a Fault Tolerant Processor Architecture.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
2009
Design of parallel fault-secure encoders for systematic cyclic block transmission codes.
Microelectron. J., 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
An effective fast and small-area parallel-pipeline architecture for OTM-convolutional encoders.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2008
Improving the design of parallel-pipeline cyclic decoders towards fault-secure versions.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Stack processor architecture and development methods suitable for dependable applications.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
Fault-Secure Interface Between Fault-Tolerant RAM and Transmission Channel Using Systematic Cyclic Codes.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
CodeRAKE: a new small-area scalable architecture for the multi-user/multi-code RAKE receiver.
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 12th IEEE International Conference on Electronics, 2005
2004
Microelectron. J., 2004
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004
2003
Designing fault-secure parallel encoders for systematic linear error correcting codes.
IEEE Trans. Reliab., 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
2002
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002
2001
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001
A fast CRC implementation on FPGA using a pipelined architecture for the polynomial division.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001
2000
A Stamping Technique to Increase the Error Correction Capacity of the (127, k, d) RS Code.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998