Fabio Somenzi
Orcid: 0000-0002-2085-2003
According to our database1,
Fabio Somenzi
authored at least 188 papers
between 1983 and 2024.
Collaborative distances:
Collaborative distances:
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Online presence:
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on id.loc.gov
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Bibliography
2024
Proceedings of the ECAI 2024 - 27th European Conference on Artificial Intelligence, 19-24 October 2024, Santiago de Compostela, Spain, 2024
Proceedings of the Computer Aided Verification - 36th International Conference, 2024
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024
2023
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2023
Proceedings of the ECAI 2023 - 26th European Conference on Artificial Intelligence, September 30 - October 4, 2023, Kraków, Poland, 2023
Proceedings of the Computer Aided Verification - 35th International Conference, 2023
2022
CoRR, 2022
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022
Proceedings of the Formal Methods for Industrial Critical Systems, 2022
Proceedings of the Automated Technology for Verification and Analysis, 2022
Proceedings of the Automated Technology for Verification and Analysis, 2022
Translating Omega-Regular Specifications to Average Objectives for Model-Free Reinforcement Learning.
Proceedings of the 21st International Conference on Autonomous Agents and Multiagent Systems, 2022
2021
Model-free Reinforcement Learning for Branching Markov Decision Processes (Artifact Evaluation for CAV 2021).
Dataset, April, 2021
Proceedings of the Formal Methods - 24th International Symposium, 2021
Proceedings of the Computer Aided Verification - 33rd International Conference, 2021
2020
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2020
Formal Controller Synthesis for Continuous-Space MDPs via Model-Free Reinforcement Learning.
Proceedings of the 11th ACM/IEEE International Conference on Cyber-Physical Systems, 2020
Proceedings of the 31st International Conference on Concurrency Theory, 2020
Faithful and Effective Reward Schemes for Model-Free Reinforcement Learning of Omega-Regular Objectives.
Proceedings of the Automated Technology for Verification and Analysis, 2020
2019
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2019
Proceedings of the Fifth International Workshop on Symbolic-Numeric methods for Reasoning about CPS and IoT, 2019
Proceedings of the Numerical Software Verification - 12th International Workshop, 2019
2018
Proceedings of the 21st International Conference on Hybrid Systems: Computation and Control (part of CPS Week), 2018
2017
Proceedings of the Automated Technology for Verification and Analysis, 2017
2016
Proving Parameterized Systems Safe by Generalizing Clausal Proofs of Small Instances.
Proceedings of the Computer Aided Verification - 28th International Conference, 2016
2014
Proceedings of the Automated Technology for Verification and Analysis, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Int. J. Softw. Tools Technol. Transf., 2013
From statistical model checking to statistical model inference: characterizing the effect of process variations in analog circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Efficient handling of obligation constraints in synthesis from omega-regular specifications.
Proceedings of the Formal Methods in Computer-Aided Design, 2013
Proceedings of the Formal Methods in Computer-Aided Design, 2013
2012
Piecewise linear modeling of nonlinear devices for formal verification of analog circuits.
Proceedings of the Formal Methods in Computer-Aided Design, 2012
Proceedings of the Computer Aided Verification - 24th International Conference, 2012
2011
Proceedings of the International Conference on Formal Methods in Computer-Aided Design, 2011
Proceedings of the First International Workshop on Design and Implementation of Formal Tools and Systems, 2011
Proceedings of the International Conference on Formal Methods in Computer-Aided Design, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
2009
Proceedings of the Theory and Applications of Satisfiability Testing, 2009
Proceedings of the Theory and Applications of Satisfiability Testing, 2009
Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, 2009
Proceedings of the 46th Design Automation Conference, 2009
2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Computer Aided Verification, 20th International Conference, 2008
2007
J. Satisf. Boolean Model. Comput., 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
Series on Integrated Circuits and Systems, Springer, ISBN: 978-0-387-34600-7, 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
An Algorithm for Strongly Connected Component Analysis in <i>n</i> log <i>n</i> Symbolic Steps.
Formal Methods Syst. Des., 2006
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2006
Decomposing image computation for symbolic reachability analysis using control flow information.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
Abstraction refinement in symbolic model checking using satisfiability as the only decision procedure.
Int. J. Softw. Tools Technol. Transf., 2005
Proceedings of the Third International Workshop on Bounded Model Checking, 2005
Efficient Conflict Analysis for Finding All Satisfying Assignments of a Boolean Circuit.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the Correct Hardware Design and Verification Methods, 2005
2004
Proceedings of the 2nd International Workshop on Bounded Model Checking, 2004
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States.
Proceedings of the Formal Methods in Computer-Aided Design, 5th International Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the Computer Aided Verification, 16th International Conference, 2004
Proceedings of the Computer Aided Verification, 16th International Conference, 2004
2003
Proceedings of the First International Workshop on Bounded Model Checking, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the Correct Hardware Design and Verification Methods, 2003
Proceedings of the Correct Hardware Design and Verification Methods, 2003
2002
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2002
Proceedings of the Formal Methods in Computer-Aided Design, 4th International Conference, 2002
Proceedings of the Computer Aided Verification, 14th International Conference, 2002
Proceedings of the Computer Aided Verification, 14th International Conference, 2002
2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Int. J. Softw. Tools Technol. Transf., 2001
Proceedings of the CONCUR 2001, 2001
2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
Proceedings of the Formal Methods in Computer-Aided Design, Third International Conference, 2000
Proceedings of the Formal Methods in Computer-Aided Design, Third International Conference, 2000
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs.
Proceedings of the 2000 Design, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the Computer Aided Verification, 12th International Conference, 2000
1999
Proceedings of the First International Workshop on Symbolic Model Checking, 1999
Proceedings of the IEEE International Conference On Computer Design, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 1999 Design, 1999
Proceedings of the Correct Hardware Design and Verification Methods, 1999
Proceedings of the Computer Aided Verification, 11th International Conference, 1999
1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the Formal Methods in Computer-Aided Design, 1998
Proceedings of the 35th Conference on Design Automation, 1998
Proceedings of the 35th Conference on Design Automation, 1998
1997
Function Decomposition and Synthesis Using Linear Sifting
Universität Trier, Mathematik/Informatik, Forschungsbericht, 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Formal Methods Syst. Des., 1997
Formal Methods Syst. Des., 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
Linear Sifting of Decision Diagrams
Universität Trier, Mathematik/Informatik, Forschungsbericht, 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Automatic state space decomposition for approximate FSM traversal based on circuit analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Symbolic computation of logic implications for technology-dependent low-power synthesis.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996
Proceedings of the Computer Aided Verification, 8th International Conference, 1996
Logic synthesis and verification algorithms.
Kluwer, ISBN: 978-0-7923-9746-5, 1996
1995
CMOS dynamic power estimation based on collapsible current source transistor modeling.
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 32st Conference on Design Automation, 1995
1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Exact and heuristic algorithms for the minimization of incompletely specified state machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Formal Methods Syst. Des., 1994
A Structural Approach to State Space Decomposition for Approximate Reachability Analysis.
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the 31st Conference on Design Automation, 1994
1993
Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
J. Electron. Test., 1993
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
Proceedings of the 30th Design Automation Conference. Dallas, 1993
Proceedings of the 30th Design Automation Conference. Dallas, 1993
Automatic Generation of Network Invariants for the Verification of Iterative Sequential Systems.
Proceedings of the Computer Aided Verification, 5th International Conference, 1993
1992
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
A new algorithm for the binate covering problem and its application to the minimization of Boolean relations.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
Proceedings of the 29th Design Automation Conference, 1992
1991
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991
Proceedings of the conference on European design automation, 1991
1990
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990
Proceedings of the European Design Automation Conference, 1990
Proceedings of the Computer-Aided Verification, 1990
1989
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988
Proceedings of the Eighteenth International Symposium on Fault-Tolerant Computing, 1988
Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988
1987
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987
1986
1985
1984
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1984
1983
Proceedings of the 20th Design Automation Conference, 1983