Fabio Pavanello
According to our database1,
Fabio Pavanello
authored at least 20 papers
between 2015 and 2024.
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Bibliography
2024
CoRR, 2024
CoRR, 2024
Complexity Assessment of Analog Security Primitives Using the Disentropy of Autocorrelation.
CoRR, 2024
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Signed Convolution in Photonics with Phase-Change Materials using Mixed-Polarity Bitstreams.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
CoRR, 2023
Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
Photonic Convolution Engine Based on Phase-Change Materials and Stochastic Computing.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
Proceedings of the IEEE European Test Symposium, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
2021
Proceedings of the 26th IEEE European Test Symposium, 2021
2018
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
2017
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017
2016
A 45 nm CMOS-SOI Monolithic Photonics Platform With Bit-Statistics-Based Resonant Microring Thermal Tuning.
IEEE J. Solid State Circuits, 2016
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016
2015
A 45nm SOI monolithic photonics chip-to-chip link with bit-statistics-based resonant microring thermal tuning.
Proceedings of the Symposium on VLSI Circuits, 2015