Fábio Passos
Orcid: 0000-0002-5638-7377
According to our database1,
Fábio Passos
authored at least 39 papers
between 2013 and 2024.
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Bibliography
2024
Low-Power 9.6-11GHz and 10.8-12GHz VCOs Designed for a 2.5/5GHz TRx using High-Q Inductors Synthesized with ML Techniques.
Proceedings of the 20th International Conference on Synthesis, 2024
Ponderous: A Performance-driven Analog IC Placement Optimizer Leveraged by a ML Pipeline.
Proceedings of the 20th International Conference on Synthesis, 2024
2023
Behavioral Analysis of Noise and Bandwidth Specifications of Heartbeat Detection Circuits for Ultra Low Power Devices.
IEEE Access, 2023
A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology.
Proceedings of the 19th International Conference on Synthesis, 2023
Efficient Hierarchical mm-Wave System Synthesis with Embedded Accurate Transformer and Balun Machine Learning Models.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2022
Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling.
Proceedings of the 18th International Conference on Synthesis, 2022
Proceedings of the 18th International Conference on Synthesis, 2022
Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient.
Proceedings of the 18th International Conference on Synthesis, 2022
A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Automatic Design of High-Gain 26.5-to-29.5-GHz Transformer-Less Low-Noise Amplifier 1.86-to-8.87-mW Variants in 65-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
In-Depth Design Space Exploration of 26.5-to-29.5-GHz 65-nm CMOS Low-Noise Amplifiers for Low-Footprint-and-Power 5G Communications Using One-and- Two -Step Design Optimization.
IEEE Access, 2021
Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs.
IEEE Access, 2021
2020
A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Synthesis of mm-Wave Wideband Receivers in 28-nm CMOS Technology for Automotive Radar Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications.
Microelectron. J., 2020
Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology.
IEEE Access, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits.
Soft Comput., 2019
Proceedings of the 16th International Conference on Synthesis, 2019
Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing.
Proceedings of the 16th International Conference on Synthesis, 2019
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design.
IEEE Trans. Very Large Scale Integr. Syst., 2018
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology.
Integr., 2018
Design Considerations of an SRAM Array for the Statistical Validation of Time-Dependent Variability Models.
Proceedings of the 15th International Conference on Synthesis, 2018
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs.
Proceedings of the 15th International Conference on Synthesis, 2018
2017
Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling.
Appl. Soft Comput., 2017
Proceedings of the 14th International Conference on Synthesis, 2017
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks.
Proceedings of the 14th International Conference on Synthesis, 2017
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization.
Proceedings of the 14th International Conference on Synthesis, 2017
An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective.
Proceedings of the 2017 IEEE Congress on Evolutionary Computation, 2017
2016
Proceedings of the 13th International Conference on Synthesis, 2016
Proceedings of the 13th International Conference on Synthesis, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Proceedings of the Technological Innovation for Collective Awareness Systems, 2014
2013
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013