Fabio Cancare

According to our database1, Fabio Cancare authored at least 15 papers between 2008 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

HERA Project's Holistic Evolutionary Framework.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2012
On the Evolution of Hardware Circuits via Reconfigurable Architectures.
ACM Trans. Reconfigurable Technol. Syst., 2012

An Enhanced Relocation Manager to Speedup Core Allocation in FPGA-based Reconfigurable Systems.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

DGECS: Description Generator for Evolved Circuits Synthesis.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

High Speed Dynamic Partial Reconfiguration for Real Time Multimedia Signal Processing.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Metronome: operating system level performance management via self-adaptive computing.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Dedicated hardware accelerators for the epistatic analysis of human genetic data.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

HERA: Hardware evolution over reconfigurable architectures.
Proceedings of the 1st International Workshop on Computing in Heterogeneous, 2011

A bird's eye view of FPGA-based Evolvable Hardware.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

2010
A design workflow for dynamically reconfigurable multi-FPGA systems.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

A direct bitstream manipulation approach for Virtex4-based evolvable systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Highly Parallel FPGA-based Evolvable Hardware Architecture.
Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009

An application-centered design flow for self reconfigurable systems implementation.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
A design flow tailored for self dynamic reconfigurable architecture.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008


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