Fabio Benevenuti

According to our database, Fabio Benevenuti authored at least 15 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Early Neutron Reliability Assessment of an Arm Cortex-M4 through Emulated Fault Injection.

Leonardo R. Gobatto, Fabio Benevenuti, Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, José Rodrigo Azambuja

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Image Classification CNNs using the FINN Engine for SRAM-based APSoC in Satellite Applications.

Arthur F. Ely, Fabio Benevenuti, Guilherme Korol, Antonio Carlos S. Beck, José Rodrigo Azambuja, Fernanda Lima Kastensmidt

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Hardening a RISC-V Softcore for Embedded Aerospace Applications in SRAM-based FPGA.

Eduardo Marañon Aguilar, Fabio Benevenuti, Fernanda Lima Kastensmidt

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Reliability Assessment of Arm Cortex-M Processors under Heavy Ions and Emulated Fault Injection.

Leonardo R. Gobatto, Fabio Benevenuti, Nemitala Added, Saulo G. Alberton, Eduardo L. A. Macchione, Vitor A. P. Aguiar, Nilberto H. Medina, Fernanda Lima Kastensmidt, José Rodrigo Azambuja

Proceedings of the 25th IEEE Latin American Test Symposium, 2024

Heavy Ion-Induced Faults on Programmable UART Controllers Embedded into SRAM-Based FPGA.

Victor O. Costa, Fabio Benevenuti, Renan Menezes, Lidia Shibuya Sato, Luis Loures, Fernanda Lima Kastensmidt, Nemitala Added, Saulo G. Alberton, Vitor A. P. Aguiar, Nilberto H. Medina

Proceedings of the 25th IEEE Latin American Test Symposium, 2024

2020

Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults.

Marcio M. Gonçalves, Fabio Benevenuti, Hector Gerardo Muñoz Hernandez, Marcelo Brandalero, Michael Hübner, Fernanda Lima Kastensmidt, José Rodrigo Azambuja

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019

Exploiting approximate computing for low-cost fault tolerant architectures.

Gennaro Severino Rodrigues, Juan Fonseca, Fabio Benevenuti, Fernanda Lima Kastensmidt, Alberto Bosio

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

Comparing Exhaustive and Random Fault Injection Methods for Configuration Memory on SRAM-based FPGAs.

Fabio Benevenuti, Fernanda Lima Kastensmidt

Proceedings of the IEEE Latin American Test Symposium, 2019

Experimental Applications on SRAM-Based FPGA for the NanosatC-BR2 Scientific Mission.

Fabio Benevenuti, Eduardo Chielle, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Carlos Alberto Zaffari, João Baptista dos Santos Martins, Otávio Santos Cupertino Durão

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

2018

Comparative Analysis of Inference Errors in a Neural Network Implemented in SRAM-Based FPGA Induced by Neutron Irradiation and Fault Injection Methods.

Fabio Benevenuti, Fabiano Libano, Vincent Pouget, Fernanda Lima Kastensmidt, Paolo Rech

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Reliability analysis on case-study traffic sign convolutional neural network on APSoC.

Israel C. Lopes, Fabio Benevenuti, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Paolo Rech

Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

Reliability evaluation on interfacing with AXI and AXI-S on Xilinx Zynq-7000 AP-SoC.

Fabio Benevenuti, Fernanda Lima Kastensmidt

Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

Analyzing AXI Streaming Interface for Hardware Acceleration in AP-SoC Under Soft Errors.

Fabio Benevenuti, Fernanda Lima Kastensmidt

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017

Evaluation of fault attack detection on SRAM-based FPGAs.

Fabio Benevenuti, Fernanda Lima Kastensmidt

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

Applying TMR in Hardware Accelerators Generated by High-Level Synthesis Design Flow for Mitigating Multiple Bit Upsets in SRAM-Based FPGAs.

André Flores dos Santos, Lucas Antunes Tambara, Fabio Benevenuti, Jorge L. Tonfat, Fernanda Lima Kastensmidt

Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017