Fabian Kreß

Orcid: 0000-0002-1700-5778

According to our database1, Fabian Kreß authored at least 24 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
LOTTA: An FPGA-based Low-Power Temporal Convolutional Network Hardware Accelerator.
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

Automated Deep Neural Network Inference Partitioning for Distributed Embedded Systems.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

A Challenge-Based Blended Learning Approach for an Introductory Digital Circuits and Systems Course.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

VHDL Crash Course: A Multimedia-Based Teaching Approach.
Proceedings of the 3rd IEEE German Education Conference, GeCon 2024, Munich, 2024

KIHT: Kaligo-Based Intelligent Handwriting Teacher.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
CNNParted: An open source framework for efficient Convolutional Neural Network inference partitioning in embedded systems.
Comput. Networks, June, 2023

Towards the on-device Handwriting Trajectory Reconstruction of the Sensor Enhanced Pen.
Proceedings of the 9th IEEE World Forum on Internet of Things, 2023

Leveraging Mixed-Precision CNN Inference for Increased Robustness and Energy Efficiency.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Automated Replacement of State-Holding Flip-Flops to Enable Non-Volatile Checkpointing.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

Context-Aware Layer Scheduling for Seamless Neural Network Inference in Cloud-Edge Systems.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

A Hardware-Aware Sampling Parameter Search for Efficient Probabilistic Object Detection.
Proceedings of the Computer Vision Systems: 14th International Conference, 2023

An Analytical Model of Configurable Systolic Arrays to find the Best-Fitting Accelerator for a given DNN Workload.
Proceedings of the DroneSE and RAPIDO: System Engineering for constrained embedded systems, 2023

SiFI-AI: A Fast and Flexible RTL Fault Simulation Framework Tailored for AI Models and Accelerators.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

ATLAS: An Approximate Time-Series LSTM Accelerator for Low-Power IoT Applications.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

A Hardware-Centric Approach to Increase and Prune Regular Activation Sparsity in CNNs.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022
Runtime Adaptive Cache Checkpointing for RISC Multi-Core Processors.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

Automated Search for Deep Neural Network Inference Partitioning on Embedded FPGA.
Proceedings of the Machine Learning and Principles and Practice of Knowledge Discovery in Databases, 2022

Hardware-aware Workload Distribution for AI-based Online Handwriting Recognition in a Sensor Pen.
Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

Data Movement Reduction for DNN Accelerators: Enabling Dynamic Quantization Through an eFPGA.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Hardware-aware Partitioning of Convolutional Neural Network Inference for Embedded AI Applications.
Proceedings of the 18th International Conference on Distributed Computing in Sensor Systems, 2022

Towards Reconfigurable Accelerators in HPC: Designing a Multipurpose eFPGA Tile for Heterogeneous SoCs.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
FLECSim-SoC: A Flexible End-to-End Co-Design Simulation Framework for System on Chips.
Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

Transparent Near-Memory Computing with a Reconfigurable Processor.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2021

2018
In-NoC Circuits for Low-Latency Cache Coherence in Distributed Shared-Memory Architectures.
Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018


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