Fabian Klass

According to our database, Fabian Klass authored at least 14 papers between 1991 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2008

An All-Digital On-Chip Process-Control Monitor for Process-Variability Measurements.

Fabian Klass, Ashish Jain, Greg Hess, Brian Park

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

DFM in practice: hit or hype?

Juan C. Rey, N. S. Nagaraj, Andrew B. Kahng, Fabian Klass, Rob Aitken, Cliff Hou, Luigi Capodieci, Vivek Singh

Proceedings of the 45th Design Automation Conference, 2008

2007

A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.

Zongjian Chen, Priya Ananthanarayanan, Sukalp Biswas, Brian Campbell, Hao Chen, Shaishav Desai, Dominic Go, Rajat Goel, Vincent von Kaenel, Jason Kassoff, Fabian Klass, Weichun Ku, Tony Li, Jonathon Lin, Khurram Malik, Anup Mehta, Daniel Murray, Eric Shiu, Chris Shuler, Sribalan Santhanam, Greg Scott, Junji Sugisawa, Toshinari Takayanagi, Honkai John Tarn, Pradeep Trivedi, James Wang, Ricky Wen, John Yong

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 2GHz, 7W (max) 64b Power^TM Microprocessor Core.

Daniel Murray, James Burnette, Brian Campbell, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2002

Timing Window Applications in UltraSPARC-IIIi? Microprocessor Design.

Rita Yu Chen, Paul Yip, Georgios K. Konstadinidis, Andrew Demas, Fabian Klass, Robert E. Mains, Margaret Schmitt, Dina Bistry

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

2000

A third-generation SPARC V9 64-b microprocessor.

Raymond A. Heald, Kathirgamar Aingaran, Chaim Amir, Michael Ang, Michael Boland, Pankaj Dixit, Gary Gouldsberry, Dale Greenley, Joel Grinberg, Jason M. Hart, Tim Horel, Wen-Jay Hsu, James M. Kaku, Chin Kim, Song Kim, Fabian Klass, Hang Kwan, Gary Lauterbach, Roger Lo, Hugh McIntyre, Anup Mehta, David Murata, Sophie Nguyen, Yet-Ping Pai, Subeer Patel, Ken Shin, Kenway Tam, Sai Vishwanthaiah, John Wu, Gin Yee, Eileen You

IEEE J. Solid State Circuits, 2000

Coupling Noise Analysis for VLIS and ULSI Circuits.

Kathirgamar Aingaran, Fabian Klass, Chin-Man Kim, Chaim Amir, Joydeep Mitra, Eileen You, Jamil Mohd, Sai-keung Dong

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

1999

A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors.

Fabian Klass, Chaim Amir, Ashutosh Das, Kathirgamar Aingaran, Cindy Truong, Richard Wang, Anup Mehta, Raymond A. Heald, Gin Yee

IEEE J. Solid State Circuits, 1999

1998

Wave-pipelining: a tutorial and research survey.

Wayne P. Burleson, Maciej J. Ciesielski, Fabian Klass, W. Liu

IEEE Trans. Very Large Scale Integr. Syst., 1998

1994

Fast multiplication in VLSI using wave pipelining techniques.

Fabian Klass, Michael J. Flynn, Ad J. van de Goor

J. VLSI Signal Process., 1994

A 16x16-bit Static CMOS Wave-Pipelined Multiplier.

Fabian Klass, Michael J. Flynn, Ad J. van de Goor

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Forum: Wave-pipelining: Is it Practical?

Wayne P. Burleson, Leonard W. Cotten, Fabian Klass, Maciej J. Ciesielski

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1992

Use of CMOS Technology in Wave Pipelining.

Fabian Klass, Johannes M. Mulder

Proceedings of the Fifth International Conference on VLSI Design, 1992

1991

Efficient Systolic Array for Matrix Multiplication.

Fabian Klass, Uri C. Weiser

Proceedings of the International Conference on Parallel Processing, 1991