F. Z. Ieromnimon

According to our database, F. Z. Ieromnimon authored at least 5 papers between 1995 and 2002.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2002

A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip.

Spyros Blionas, Kostas Masselos, Chrissavgi Dre, Christos Drosos, F. Z. Ieromnimon, T. Pagonis, Aristodemos Pneymatikakis, Anna Tatsaki, T. Trimis, A. Vontzalidis, Dimitris Metafas

Proceedings of the Field-Programmable Logic and Applications, 2002

1996

Parallel Graph Reduction with the PACE Architecture.

M. E. Waite, T. J. Reynolds, F. Z. Ieromnimon

Proceedings of the 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996

The Design and Simulation of the PACE Prototype Architecture.

F. Z. Ieromnimon, T. J. Reynolds, M. E. Waite

Proceedings of the MASCOTS '96, 1996

1995

A New Approach to the Design of a Highly-Parallel Computer.

M. E. Waite, T. J. Reynolds, F. Z. Ieromnimon

Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995

PACE: Fine-Grained Parallel Graph Reducion.

T. J. Reynolds, M. E. Waite, F. Z. Ieromnimon

Proceedings of the 1995 International Conference on Parallel Processing, 1995