Ezequiel Herruzo

Orcid: 0000-0003-3279-3802

According to our database1, Ezequiel Herruzo authored at least 12 papers between 2004 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
Optimizing the physical implementation of a reconfigurable cache.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

2011
simARQ, An Automatic Repeat Request Simulator for Teaching Purposes.
Proceedings of the IT Revolutions, 2011

2010
Reconfigurable Cache Implemented on an FPGA.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

2009
MESI Cache Coherence Simulator for Teaching Purposes.
CLEI Electron. J., 2009

2008
Teaching the Cache Memory System Using a Reconfigurable Approach.
IEEE Trans. Educ., 2008

Using Padding to Optimize Locality in Scientific Applications.
Proceedings of the Computational Science, 2008

2007
Maximum and Sorted Cache Occupation Using Array Padding.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

A New Parallel Sorting Algorithm based on Odd-Even Mergesort.
Proceedings of the 15th Euromicro International Conference on Parallel, 2007

Simulating a Reconfigurable Cache System for Teaching Purposes.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2005
Distributed Architecture System for Computer Performance Testing.
Proceedings of the Parallel Processing and Applied Mathematics, 2005

Reducing Cache Misses by Loop Reordering.
Proceedings of the Parallel Computing: Current & Future Issues of High-End Computing, 2005

2004
Applying Loop Tiling and Unrolling to a Sparse Kernel Code.
Proceedings of the Computational Science, 2004


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