Evgeny Bolotin

According to our database, Evgeny Bolotin authored at least 26 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

AutoScratch: ML-Optimized Cache Management for Inference-Oriented GPUs.

Yaosheng Fu, Evgeny Bolotin, Aamer Jaleel, Gal Dalal, Shie Mannor, Jacob Subag, Noam Korem, Michael Behar, David W. Nellans

Proceedings of the Sixth Conference on Machine Learning and Systems, 2023

2022

GPU Domain Specialization via Composable On-Package Architecture.

Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler

ACM Trans. Archit. Code Optim., 2022

2021

Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator.

Oreste Villa, Daniel Lustig, Zi Yan, Evgeny Bolotin, Yaosheng Fu, Niladrish Chatterjee, Nan Jiang, David W. Nellans

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systems.

Ahmet Fatih Inci, Evgeny Bolotin, Yaosheng Fu, Gal Dalal, Shie Mannor, David W. Nellans, Diana Marculescu

CoRR, 2020

HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems.

Xiaowei Ren, Daniel Lustig, Evgeny Bolotin, Aamer Jaleel, Oreste Villa, David W. Nellans

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019

Understanding the Future of Energy Efficiency in Multi-Module GPUs.

Akhil Arunkumar, Evgeny Bolotin, David W. Nellans, Carole-Jean Wu

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

2018

Combining HW/SW Mechanisms to Improve NUMA Performance of Multi-GPU Systems.

Vinson Young, Aamer Jaleel, Evgeny Bolotin, Eiman Ebrahimi, David W. Nellans, Oreste Villa

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

2017

Beyond the socket: NUMA-aware GPUs.

Ugljesa Milic, Oreste Villa, Evgeny Bolotin, Akhil Arunkumar, Eiman Ebrahimi, Aamer Jaleel, Alex Ramírez, David W. Nellans

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

MCM-GPU: Multi-Chip-Module GPUs for Continued Performance Scalability.

Akhil Arunkumar, Evgeny Bolotin, Benjamin Y. Cho, Ugljesa Milic, Eiman Ebrahimi, Oreste Villa, Aamer Jaleel, Carole-Jean Wu, David W. Nellans

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

2016

CLARA: Circular Linked-List Auto and Self Refresh Architecture.

Aditya Agrawal, Mike O'Connor, Evgeny Bolotin, Niladrish Chatterjee, Joel S. Emer, Stephen W. Keckler

Proceedings of the Second International Symposium on Memory Systems, 2016

A case for toggle-aware compression for GPU systems.

Gennady Pekhimenko, Evgeny Bolotin, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015

Designing Efficient Heterogeneous Memory Architectures.

Evgeny Bolotin, David W. Nellans, Oreste Villa, Mike O'Connor, Alex Ramírez, Stephen W. Keckler

IEEE Micro, 2015

Toggle-Aware Compression for GPUs.

Gennady Pekhimenko, Evgeny Bolotin, Mike O'Connor, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler

IEEE Comput. Archit. Lett., 2015

Anatomy of GPU Memory System for Multi-Application Execution.

Adwait Jog, Onur Kayiran, Tuba Kesten, Ashutosh Pattnaik, Evgeny Bolotin, Niladrish Chatterjee, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das

Proceedings of the 2015 International Symposium on Memory Systems, 2015

2014

Scaling the Power Wall: A Path to Exascale.

Oreste Villa, Daniel R. Johnson, Mike O'Connor, Evgeny Bolotin, David W. Nellans, Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, Stephen W. Keckler, William J. Dally

Proceedings of the International Conference for High Performance Computing, 2014

Application-aware Memory System for Fair and Efficient Execution of Concurrent GPGPU Applications.

Adwait Jog, Evgeny Bolotin, Zvika Guz, Mike Parker, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das

Proceedings of the Seventh Workshop on General Purpose Processing Using GPUs, 2014

2012

Exploring the limits of GPGPU scheduling in control flow bound applications.

Roman Malits, Evgeny Bolotin, Avinoam Kolodny, Avi Mendelson

ACM Trans. Archit. Code Optim., 2012

2009

Many-Core vs. Many-Thread Machines: Stay Away From the Valley.

Zvika Guz, Evgeny Bolotin, Idit Keidar, Avinoam Kolodny, Avi Mendelson, Uri C. Weiser

IEEE Comput. Archit. Lett., 2009

2007

Network Delays and Link Capacities in Application-Specific Wormhole NoCs.

Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

VLSI Design, 2007

The Power of Priority: NoC Based Distributed Cache Coherency.

Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Proceedings of the First International Symposium on Networks-on-Chips, 2007

Routing table minimization for irregular mesh NoCs.

Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Efficient link capacity and QoS design for network-on-chip.

Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2004

QNoC: QoS architecture and design process for network on chip.

Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

J. Syst. Archit., 2004

Cost considerations in network on chip.

Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Integr., 2004

Micro-modem - reliability solution for NoC communications.

Arkadiy Morgenshtein, Evgeny Bolotin, Israel Cidon, Avinoam Kolodny, Ran Ginosar

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Automatic hardware-efficient SoC integration by QoS network on chip.

Evgeny Bolotin, Arkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004