Eun-Gu Jung
Orcid: 0000-0002-8295-5235
According to our database1,
Eun-Gu Jung
authored at least 19 papers
between 2003 and 2021.
Collaborative distances:
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Bibliography
2021
Synchronous Real-Time Sampling Technique for Side-Channel Analysis Against Randomly Varying Clock-Based Countermeasures.
IEEE Access, 2021
2016
Stenosis map for volume visualization of constricted tubular structures: Application to coronary artery stenosis.
Comput. Methods Programs Biomed., 2016
2013
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013
2011
Proceedings of the International SoC Design Conference, 2011
2010
A Performance/Energy Analysis and Optimization of Multi-Core Architectures with Voltage Scaling Techniques.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Exploration of Power-Delay Trade-Offs with Heterogeneous Adders by Integer Linear Programming.
J. Circuits Syst. Comput., 2009
Parallel Parity Checksum and Syndrome Generation for Digital Video and Audio Transmission over Cable Channel.
IEICE Trans. Inf. Syst., 2009
An Asymptotic Performance/Energy Analysis and Optimization of Multi-core Architectures.
Proceedings of the Distributed Computing and Networking, 10th International Conference, 2009
2008
Embedding High-Performance Synchronous Routers to Asynchronous Network on Chip.
Proceedings of the 2008 International Conference on Computer Design, 2008
2007
Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions.
J. VLSI Signal Process., 2007
2005
IEICE Trans. Electron., 2005
IEICE Trans. Inf. Syst., 2005
IEICE Trans. Electron., 2005
High Speed JPEG Coder Based on Modularized and Pipelined Architecture with Distributed Control.
Proceedings of the Advances in Multimedia Information Processing, 2005
Design of an Asynchronous Switch Based on Butterfly Fat-Tree for Network-on-Chip Applications.
Proceedings of the Advances in Multimedia Information Processing, 2005
Self-timed Interconnect with Layered Interface Based on Distributed and Modularized Control for Multimedia SoCs.
Proceedings of the Advances in Multimedia Information Processing, 2005
High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003