Euiseok Kim
Orcid: 0009-0004-1048-6080
According to our database1,
Euiseok Kim
authored at least 26 papers
between 2000 and 2023.
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Bibliography
2023
Internet Things, December, 2023
IEEE Comput. Archit. Lett., 2023
2022
Recognition Accuracy Enhancement using Interface Control with Weight Variation-Lowering in Analog Computation-in-Memory.
Proceedings of the IEEE International Memory Workshop, 2022
2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Proceedings of the 2017 International Conference on Compilers, 2017
2016
An Adaptive Frames Per Second-Based CPU-GPU Cooperative Dynamic Voltage and Frequency Scaling Governing Technique for Mobile Games.
J. Low Power Electron., 2016
2015
Strategy transformation under technological convergence: evidence from the printed electronics industry.
Int. J. Technol. Manag., 2015
2014
ACM Trans. Multim. Comput. Commun. Appl., 2014
IEEE Trans. Consumer Electron., 2014
Dynamic patterns of technological convergence in printed electronics technologies: patent citation network.
Scientometrics, 2014
2013
Proceedings of the Proceeding of the 23rd ACM Workshop on Network and Operating Systems Support for Digital Audio and Video, 2013
2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2005
Instruction level redundant number computations for fast data intensive processing in asynchronous processors.
J. Syst. Archit., 2005
2004
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization.
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004
2003
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units.
Proceedings of the 2003 Design, 2003
Control Signal Sharing Using Data-Path Delay Information at Control Data Flow Graph Descriptions.
Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003
Performance optimization of synchronous control units for datapaths with variable delay arithmetic units.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2001
A new resource constrained asynchronous scheduling method through transformation of dataflow graphs.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of ASP-DAC 2001, 2001
Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG.
Proceedings of the 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 2001
2000
Automatic distributed asynchronous control circuit generation from data flow graph for asynchronous high-level synthesis.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000