Eugene Shragowitz

According to our database, Eugene Shragowitz authored at least 30 papers between 1985 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2016

Adaptive Partitions.

Ping Deng, Weili Wu, Eugene Shragowitz, Ding-Zhu Du

Encyclopedia of Algorithms, 2016

2008

Adaptive Partitions.

Ping Deng, Weili Wu, Eugene Shragowitz

Proceedings of the Encyclopedia of Algorithms - 2008 Edition, 2008

2006

Iterative-Constructive Standard Cell Placer for High Speed and Low Power.

Sungjae Kim, Eugene Shragowitz

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

2003

Iterative Converging Algorithms for Computing Bounds on Durations of Activities in Pert and Pert-Like Models.

Eugene Shragowitz, Habib Youssef, Bing Lu

J. Comb. Optim., 2003

Transaction-based waveform analysis for IP selection.

Jian Liu, Eugene Shragowitz

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

Net criticality revisited: an effective method to improve timing in physical design.

H. Chang, Eugene Shragowitz, Jian Liu, Habib Youssef, Bing Lu, Suphachai Sutanthavibul

Proceedings of 2002 International Symposium on Physical Design, 2002

A polynomial time approximation scheme for rectilinear Steiner minimum tree construction in the presence of obstacles.

Jian Liu, Ying Zhao, Eugene Shragowitz, George Karypis

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001

Wire segmenting for buffer insertion based on RSTP-MSP.

Bing Lu, Jun Gu, Xiao-Dong Hu, Eugene Shragowitz

Theor. Comput. Sci., 2001

Combining Hierarchical Filtering, Fuzzy Logic, and Simulation with Software Agents for IP (Intellectual Property) Selection in Electronic Design.

Jian Liu, Eugene Shragowitz, Wei-Tek Tsai

Int. J. Artif. Intell. Tools, 2001

1998

Application of fuzzy logic in computer-aided VLSI design.

Eugene Shragowitz, Jun-Yong Lee, Eric Q. Kang

IEEE Trans. Fuzzy Syst., 1998

1995

Performance Driven Technology Mapper for FPGAs with Complex Logic Block Structures.

Jun-Yong Lee, Eugene Shragowitz

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Technology mapping for FPGAs with complex block architectures by fuzzy logic techniques.

Jung-Yong Lee, Eugene Shragowitz

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

Generic fuzzy logic CAD development tool.

Eric Q. Kang, Eugene Shragowitz

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994

Fuzzy logic approach to VLSI placement.

Eric Q. Kang, Rung-Bin Lin, Eugene Shragowitz

IEEE Trans. Very Large Scale Integr. Syst., 1994

1993

An adaptive timing-driven placement for high performance VLSIs.

Suphachai Sutanthavibul, Eugene Shragowitz, Rung-Bin Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Bounds on net lengths for high-speed PCB.

Jaebum Lee, Eugene Shragowitz, David J. Poli

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992

Prelayout timing analysis of cell-based VLSI designs.

Habib Youssef, Eugene Shragowitz, Suphachai Sutanthavibul

Comput. Aided Des., 1992

Fuzzy Logic Approach to Placement Problem.

Rung-Bin Lin, Eugene Shragowitz

Proceedings of the 29th Design Automation Conference, 1992

1991

An analytical approach to floorplan design and optimization.

Suphachai Sutanthavibul, Eugene Shragowitz, J. Ben Rosen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Bounds on Net Delays for Physical Design of Fast Circuits.

Habib Youssef, Rung-Bin Lin, Eugene Shragowitz

Proceedings of the VLSI 91, 1991

Dynamic Prediction of Critical Paths and Nets for Constructive Timing-Driven Placement.

Suphachai Sutanthavibul, Eugene Shragowitz

Proceedings of the 28th Design Automation Conference, 1991

1990

Timing Constraints for Correct Performance.

Habib Youssef, Eugene Shragowitz

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

An Adaptive Timing-Driven Layout for High Speed VLSI.

Suphachai Sutanthavibul, Eugene Shragowitz

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989

Critical path issue in VLSI design.

Habib Youssef, Eugene Shragowitz, Lionel Bening

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988

A Hypercube Algorithm for the 0/1 Knapsack Problem.

Jong Lee, Eugene Shragowitz, Sartaj Sahni

J. Parallel Distributed Comput., 1988

1987

A global router based on a multicommodity flow model.

Eugene Shragowitz, S. Keel

Integr., 1987

A Hypecube Algorithm for the 0/1 Knapsack Problem.

Jong Lee, Sartaj Sahni, Eugene Shragowitz

Proceedings of the International Conference on Parallel Processing, 1987

1986

Simulated annealing and combinatorial optimization.

Surendra Nahar, Sartaj Sahni, Eugene Shragowitz

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

Automated layout synthesis in the YASC silicon compiler.

David E. Krekelberg, Eugene Shragowitz, Gerald E. Sobelman, Li-Shin Lin

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1985

Experiments with simulated annealing.

Surendra Nahar, Sartaj Sahni, Eugene Shragowitz

Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985