Eugene Koskin

According to our database, Eugene Koskin authored at least 19 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2024

Gate-Level Statistical Timing Analysis: Exact Solutions, Approximations and Algorithms.

Dmytro Mishagli, Eugene Koskin, Elena Blokhina

CoRR, 2024

Quantum Theory and Application of Contextual Optimal Transport.

Nicola Mariella, Albert Akhriev, Francesco Tacchino, Christa Zoufal, Juan Carlos Gonzalez-Espitia, Benedek Harsanyi, Eugene Koskin, Ivano Tavernelli, Stefan Woerner, Marianna Rapsomaniki, Sergiy Zhuk, Jannis Born

Proceedings of the Forty-first International Conference on Machine Learning, 2024

2023

An On-Chip Picoampere-Level Leakage Current Sensor for Quantum Processors in 22-nm FD-SOI CMOS.

Ali Esmailiyan, Elena Blokhina, Dennis Andrade-Miceli, Eoin Faust, Panagiotis Giounanlis, Dirk Leipold, Hongying Wang, Imran Bashir, Eugene Koskin, Teerachot Siriburanon, Robert Bogdan Staszewski

IEEE Trans. Circuits Syst. II Express Briefs, June, 2023

2021

Jitter Optimisation in a Generalised All-Digital Phase-Locked Loop Model.

Eugene Koskin, Pierre Bisiaux, Dimitri Galayko, Elena Blokhina

IEEE Trans. Circuits Syst. II Express Briefs, 2021

All Digital Phase-Locked Loop Networks for Clock Generation and Distribution: Network Stability, Convergence and Performance.

Eugene Koskin, Pierre Bisiaux, Dimitri Galayko, Elena Blokhina

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020

Electrostatic Control and Entanglement of CMOS Position-Based Qubits.

Panagiotis Giounanlis, Andrii Sokolov, Elena Blokhina, Eugene Koskin, Imran Bashir, Dirk Leipold, Robert Bogdan Staszewski

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Simulation Methodology for Electron Transfer in CMOS Quantum Dots.

Andrii Sokolov, Dmytro Mishagli, Panagiotis Giounanlis, Imran Bashir, Dirk Leipold, Eugene Koskin, Robert Bogdan Staszewski, Elena Blokhina

Proceedings of the Computational Science - ICCS 2020, 2020

Synchronisation in Noisy PLL Networks: Time Domain Model and its Analysis.

Eugene Koskin, Maksim Balakin, Nikita Ryskin, Dimitri Galayko, Elena Blokhina

Proceedings of the European Conference on Circuit Theory and Design, 2020

FPGA Validation of Event-Driven ADPLL.

Eugene Koskin, Pierre Bisiaux, Dimitri Galayko, Elena Blokhina

Proceedings of the European Conference on Circuit Theory and Design, 2020

Design of a 1.5 GHz Low jitter DCO Ring in 28 nm CMOS Process.

Pierre Bisiaux, Elena Blokhina, Eugene Koskin, Teerachot Siriburanon, Dimitri Galayko

Proceedings of the European Conference on Circuit Theory and Design, 2020

2019

All-Digital Phase-Locked Loop Arrays: Investigation of Synchronisation and Jitter Performance through FPGA Prototyping.

Eugene Koskin, Pierre Bisiaux, Dimitri Galayko, Elena Blokhina

Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Path-Based Statistical Static Timing Analysis for Large Integrated Circuits in a Weak Correlation Approximation.

Dmytro Mishagli, Eugene Koskin, Elena Blokhina

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

Generation of a Clocking Signal in Synchronized All-Digital PLL Networks.

Eugene Koskin, Dimitri Galayko, Orla Feely, Elena Blokhina

IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Concept of Synchronous ADPLL Networks in Application to Small-Scale Antenna Arrays.

Eugene Koskin, Dimitri Galayko, Elena Blokhina

IEEE Access, 2018

Averaging Techniques for the Analysis of Event Driven Models of All Digital PLLs.

Eugene Koskin, Dimitri Galayko, Elena Blokhina

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

Semianalytical model for high speed analysis of all-digital PLL clock-generating networks.

Eugene Koskin, Dimitri Galayko, Orla Feely, Elena Blokhina

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016

Discrete-time modelling and experimental validation of an All-Digital PLL for clock-generating networks.

Eugene Koskin, Elena Blokhina, Chuan Shan, Eldar Zianbetov, Orla Feely, Dimitri Galayko

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Discrete-time modelling and experimental validation of an all-digital PLL for clock-generating networks.

Eugene Koskin

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

Mode-locking in a network of kuramoto-like oscillators.

Eugene Koskin, Dimitri Galayko, Orla Feely, Elena Blokhina

Proceedings of the 2015 International Joint Conference on Neural Networks, 2015