Ethan C. Ahn

According to our database, Ethan C. Ahn authored at least 5 papers between 2017 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

iCELIA: A Full-Stack Framework for STT-MRAM-Based Deep Learning Acceleration.

Hao Yan, Hebin R. Cherian, Ethan C. Ahn, Xuehai Qian, Lide Duan

IEEE Trans. Parallel Distributed Syst., 2020

2019

Mitigating and Tolerating Read Disturbance in STT-MRAM-Based Main Memory via Device and Architecture Innovations.

Armin Haj Aboutalebi, Ethan C. Ahn, Bo Mao, Suzhen Wu, Lide Duan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018

CELIA: A Device and Architecture Co-Design Framework for STT-MRAM-Based Deep Learning Acceleration.

Hao Yan, Hebin R. Cherian, Ethan C. Ahn, Lide Duan

Proceedings of the 32nd International Conference on Supercomputing, 2018

2017

Vulnerability Analysis of On-Chip Access-Control Memory.

Chintan Chavda, Ethan C. Ahn, Yu-Sheng Chen, Youngjae Kim, Kalidas Ganesh, Junghee Lee

Proceedings of the 9th USENIX Workshop on Hot Topics in Storage and File Systems, 2017

Enabling NVM-based deep learning acceleration using nonuniform data quantization: work-in-progress.

Hao Yan, Ethan C. Ahn, Lide Duan

Proceedings of the 2017 International Conference on Compilers, 2017