Esteve Amat

IEEE Trans. Emerg. Top. Comput., 2018

Optimization of FinFET-Based Gain Cells for Low Power Sub-V T Embedded DRAMs.

[BibT_eX]

[DOI]

J. Low Power Electron., 2018

Modem Gain-Cell Memories in Advanced Technologies.

[BibT_eX]

[DOI]

Ramon Canal

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

Quantum dot location relevance into SET-FET circuits based on FinFET devices.

[BibT_eX]

[DOI]

Alberto del Moral

Joan R. Bausells

Francesc Pérez-Murano

Fabian J. Klüpfel

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

2017

Resistive Random Access Memory Variability and Its Mitigation Schemes.

[BibT_eX]

[DOI]

J. Low Power Electron., 2017

Suitability of FinFET introduction into eDRAM cells for operate at sub-threshold level.

[BibT_eX]

[DOI]

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

2016

Feasibility of Embedded DRAM Cells on FinFET Technology.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

RRAM variability and its mitigation schemes.

[BibT_eX]

[DOI]

Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Monitoring SRAM BTI degradation by current-based tracking technique.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Statistical analysis and comparison of 2T and 3T1D e-DRAM minimum energy operation.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

2015

Adaptive Proactive Reconfiguration: A Technique for Process-Variability- and Aging-Aware SRAM Cache Design.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Variability Influence on FinFET-Based On-Chip Memory Data Paths.

[BibT_eX]

[DOI]

J. Low Power Electron., 2015

Analysis and design of an adaptive proactive reconfiguration approach for memristive crossbar memories.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

UTBB FDSOI technology flexibility for ultra low power internet-of-things applications.

[BibT_eX]

[DOI]

Edith Beigné

Jean-Frédéric Christmann

Proceedings of the 45th European Solid State Device Research Conference, 2015

Memristive crossbar design and test in non-adaptive proactive reconfiguring scheme.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Circuit Theory and Design, 2015

Statistical lifetime analysis of memristive crossbar matrix.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015

2014

SET and noise fault tolerant circuit design techniques: Application to 7 nm FinFET.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Strategies to enhance the 3T1D-DRAM cell variability robustness beyond 22 nm.

[BibT_eX]

[DOI]

Microelectron. J., 2014

Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches.

[BibT_eX]

[DOI]

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013

Systematic and random variability analysis of two different 6T-SRAM layout topologies.

[BibT_eX]

[DOI]

Microelectron. J., 2013

A single event transient hardening circuit design technique based on strengthening.

[BibT_eX]

[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Variability robustness enhancement for 7nm FinFET 3T1D-DRAM cells.

[BibT_eX]

[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Reliability study on technology trends beyond 20nm.

[BibT_eX]

[DOI]

Antonio Calomarde

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

Design and implementation of an adaptive proactive reconfiguration technique for SRAM caches.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Process variability-aware proactive reconfiguration technique for mitigating aging effects in nano scale SRAM lifetime.

[BibT_eX]

[DOI]