Esko Mikkola

According to our database1, Esko Mikkola authored at least 7 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Modeling of Bias-Dependent Single Event Transients for Circuit Sensitivity Calculation.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A 4.8 GS/s 11b Time-Interleaved TDC-Assisted SAR ADC with High-Speed Latch-based VTC.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022
A 5-GS/s 6-Bit 15.07-mW Flash ADC With Partially Active Second-Stage Comparison and 2× Time-Domain Interpolation.
IEEE Trans. Very Large Scale Integr. Syst., 2022

2019
A 500 MS/s 10-Bit Single-Channel SAR ADC with A Double-Rate Comparator.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2017
RFI mitigating receiver back-end for radiometers.
Proceedings of the 2017 IEEE International Geoscience and Remote Sensing Symposium, 2017

2013
Semiconductor failure modes and mitigation for critical systems embedded tutorial.
Proceedings of the 18th IEEE European Test Symposium, 2013

2012
A Robustness Assessment for Design Tool.
Proceedings of the Infotech@Aerospace 2012, 2012


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