Erven Rohou
Orcid: 0000-0002-8060-8360
According to our database1,
Erven Rohou
authored at least 64 papers
between 1997 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Proceedings of the 30th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2024
SCHEMATIC: Compile-Time Checkpoint Placement and Memory Allocation for Intermittent Systems.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2024
2023
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2023
2021
So Far So Good: Self-Adaptive Dynamic Checkpointing for Intermittent Computation based on Self-Modifying Code.
Proceedings of the SCOPES '21: 24th International Workshop on Software and Compilers for Embedded Systems, Eindhoven, The Netherlands, November 1, 2021
Proceedings of the IEEE European Symposium on Security and Privacy Workshops, 2021
Proceedings of the ASSS '21: Proceedings of the 2021 International Symposium on Advanced Security on Software and Systems, 2021
2020
IR-Level Dynamic Data Dependence Using Abstract Interpretation Towards Speculative Parallelization.
IEEE Access, 2020
Compiler Optimizations for Safe Insertion of Checkpoints in Intermittently Powered Systems.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020
Proceedings of the IEEE European Symposium on Security and Privacy Workshops, 2020
Approximate Data Dependence Profiling Based on Abstract Interval and Congruent Domains.
Proceedings of the Architecture of Computing Systems - ARCS 2020, 2020
2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Inf. Process. Lett., 2019
Supporting the Scale-Up of High Performance Application to Pre-Exascale Systems: The ANTAREX Approach.
Proceedings of the 27th Euromicro International Conference on Parallel, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Energy-Efficient Memory Mappings based on Partial WCET Analysis and Multi-Retention Time STT-RAM.
Proceedings of the 26th International Conference on Real-Time Networks and Systems, 2018
Compile-Time Silent-Store Elimination for Energy Efficiency: an Analytic Evaluation for Non-Volatile Cache Memory.
Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018
ANTAREX: A DSL-Based Approach to Adaptively Optimizing and Enforcing Extra-Functional Properties in High Performance Computing.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
2017
Int. J. Parallel Program., 2017
Proceedings of the 17th International Workshop on Worst-Case Execution Time Analysis, 2017
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Implications of Reduced-Precision Computations in HPC: Performance, Energy and Error.
Proceedings of the Parallel Computing is Everywhere, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 26th International Conference on Compiler Construction, 2017
2016
Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
Autotuning and adaptivity approach for energy efficient Exascale HPC systems: The ANTAREX approach.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
2015
ACM Trans. Archit. Code Optim., 2015
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015
Proceedings of the 21st IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2015
Proceedings of the International Conference on Computational Science, 2015
ANTAREX - AutoTuning and Adaptivity appRoach for Energy Efficient eXascale HPC Systems.
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015
Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2015
, 2015
2014
Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, 2014
Traceability of Flow Information: Reconciling Compiler Optimizations and WCET Estimation.
Proceedings of the 22nd International Conference on Real-Time Networks and Systems, 2014
Arbitrary control-flow embedding into multiple threads for obfuscation: a preliminary complexity and performance analysis.
Proceedings of the Second International Workshop on Security in Cloud Computing, 2014
2013
ACM Trans. Archit. Code Optim., 2013
2012
Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012
2011
Int. J. Parallel Program., 2011
Predictable Binary Code Cache: A First Step towards Reconciling Predictability and Just-in-Time Compilation.
Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011
Proceedings of the High Performance Embedded Architectures and Compilers, 2011
2010
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010
Processor virtualization and split compilation for heterogeneous multicore embedded systems.
Proceedings of the 47th Design Automation Conference, 2010
2008
An Experimental Environment Validating the Suitability of CLI as an Effective Deployment Format for Embedded Systems.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008
Combining Processor Virtualization and Split Compilation for Heterogeneous Multicore Embedded Systems.
Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008
Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008
2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2002
Proceedings of the High Performance Computing, 4th International Symposium, 2002
2000
1999
Proceedings of the Languages and Compilers for Parallel Computing, 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
1998
Infrastructures et stratégies de compilation pour parallélisme à grain fin. (Infrastructures and Compilation Strategies for Instruction-Level Parallelism).
PhD thesis, 1998
Proceedings of the Euro-Par '98 Parallel Processing, 1998
1997
Proceedings of the Euro-Par '97 Parallel Processing, 1997