Ernst Haselsteiner

According to our database1, Ernst Haselsteiner authored at least 7 papers between 1999 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Memory-efficient on-card byte code verification for Java cards.
Proceedings of the First Workshop on Cryptography and Security in Computing Systems, 2014

2011
Idea: Simulation Based Security Requirement Verification for Transaction Level Models.
Proceedings of the Engineering Secure Software and Systems - Third International Symposium, 2011

2010
Identification and Verification of Security Relevant Functions in Embedded Systems Based on Source Code Annotations and Assertions.
Proceedings of the Information Security Theory and Practices. Security and Privacy of Pervasive Systems and Smart Devices, 2010

Towards formal system-level verification of security requirements during hardware/software codesign.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Fast simulation based testing of anti-tearing mechanisms for small embedded systems.
Proceedings of the 15th European Test Symposium, 2010

2009
Java Card Performance Optimization of Secure Transaction Atomicity Based on Increasing the Class Field Locality.
Proceedings of the Third IEEE International Conference on Secure Software Integration and Reliability Improvement, 2009

1999
Dynamic targets - adapting supervised learning to time series classification.
Proceedings of the International Joint Conference Neural Networks, 1999


  Loading...