Ernest Knoll

According to our database1, Ernest Knoll authored at least 7 papers between 1996 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
I-DVFS: Instantaneous Frequency Switch During Dynamic Voltage and Frequency Scaling.
IEEE Micro, 2021

2016
4.1 14nm 6th-generation Core processor SoC with low power consumption and improved performance.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2012
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor.
IEEE J. Solid State Circuits, 2012

2011
A fully integrated multi-CPU, GPU and memory controller 32nm processor.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

The Second Generation Intel® Core™: A highly integrated high performance multi IA-core and processor graphics chip.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2007
The Implementation of the 65nm Dual-Core 64b Merom Processor.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

1996
An interpolating clock synthesizer.
IEEE J. Solid State Circuits, 1996


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