Erik R. Altman
Orcid: 0009-0001-0978-0360Affiliations:
- Thomas J. Watson Research Center, Yorktown Heights, USA
According to our database1,
Erik R. Altman
authored at least 77 papers
between 1992 and 2024.
Collaborative distances:
Collaborative distances:
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on dl.acm.org
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Bibliography
2024
Graph Feature Preprocessor: Real-time Extraction of Subgraph-based Features from Transaction Graphs.
CoRR, 2024
Graph Feature Preprocessor: Real-time Subgraph-based Feature Extraction for Financial Crime Detection.
Proceedings of the 5th ACM International Conference on AI in Finance, 2024
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024
2023
CoRR, 2023
Proceedings of the 16th ACM International Conference on Systems and Storage, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
2021
Proceedings of the IEEE International Conference on Acoustics, 2021
2019
2014
IEEE Micro, 2014
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014
Towards an automated approach to use expert systems in the performance testing of distributed systems.
Proceedings of the 2014 Workshop on Joining AcadeMiA and Industry Contributions to Test Automation and Model-Based Testing, 2014
2013
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013
2012
2011
2010
Observations on tuning a Java enterprise application for performance and scalability.
IBM J. Res. Dev., 2010
Proceedings of the 25th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2010
2008
Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008
2007
Efficient Register Mapping and Allocation in LaTTe, an Open-Source Java Just-in-Time Compiler.
IEEE Trans. Parallel Distributed Syst., 2007
2006
2005
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005
05101 Abstracts Collection - Scheduling for Parallel Architectures: Theory, Applications, Challenges.
Proceedings of the Scheduling for Parallel Architectures: Theory, Applications, Challenges, 2005
05101 Executive Summary - Scheduling for Parallel Architectures: Theory, Applications, Challenges.
Proceedings of the Scheduling for Parallel Architectures: Theory, Applications, Challenges, 2005
2004
<i>V</i>LaTTe: A Java Just-in-Time Compiler for VLIW with Fast Scheduling and Register Allocation.
IEICE Trans. Inf. Syst., 2004
2002
A Theory for Co-Scheduling Hardware and Software Pipelines in ASIPs and Embedded Processors.
Des. Autom. Embed. Syst., 2002
Proceedings of the Compiler Construction, 11th International Conference, 2002
2001
SIGARCH Comput. Archit. News, 2001
Proc. IEEE, 2001
2000
SIGARCH Comput. Archit. News, 2000
Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory.
Int. J. Parallel Program., 2000
Proceedings of the ACM 2000 Java Grande Conference, San Francisco, CA, USA, 2000
Proceedings of the 14th international conference on Supercomputing, 2000
Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000
1999
Proceedings of the 32nd Annual IEEE/ACM International Symposium on Microarchitecture, 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, 1999
1998
A Unified Framework for Instruction Scheduling and Mapping for Function Units with Structural Hazards.
J. Parallel Distributed Comput., 1998
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
1997
IBM J. Res. Dev., 1997
Proceedings of the 24th International Symposium on Computer Architecture, 1997
1996
IEEE Trans. Parallel Distributed Syst., 1996
Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
1995
Proceedings of the ACM SIGPLAN'95 Conference on Programming Language Design and Implementation (PLDI), 1995
Proceedings of the Languages and Compilers for Parallel Computing, 1995
1994
Minimizing register requirements under resource-constrained rate-optimal software pipelining.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994
A Comparative Study of Multiprocessor List Scheduling Heuristics.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994
1993
A Novel Methodology Using Genetic Algorithms for the Design of Caches and Cache Replacement Policy.
Proceedings of the 5th International Conference on Genetic Algorithms, 1993
1992
Proceedings of the Compiler Construction, 1992