Erik Nelson

According to our database, Erik Nelson authored at least 16 papers between 2005 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

VeVaPy, a Python Platform for Efficient Verification and Validation of Systems Biology Models with Demonstrations Using Hypothalamic-Pituitary-Adrenal Axis Models.

Christopher Parker, Erik Nelson, Tongli Zhang

Entropy, December, 2022

2021

Inexact Loops in Robotics Problems.

Erik Nelson

Proceedings of the Robotics: Science and Systems XVII, Virtual Event, July 12-16, 2021., 2021

2018

Environment model adaptation for mobile robot exploration.

Erik Nelson, Micah Corah, Nathan Michael

Auton. Robots, 2018

2017

Interaction of Automation Visibility and Information Quality in Flight Deck Information Automation.

Michael C. Dorneich, Rachel F. Dudley, Emmanuel Letsu-Dake, William Rogers, Stephen D. Whitlow, Michael C. Dillard, Erik Nelson

IEEE Trans. Hum. Mach. Syst., 2017

AtomMap: A probabilistic amorphous 3D map representation for robotics and surface reconstruction.

David Fridovich-Keil, Erik Nelson, Avideh Zakhor

Proceedings of the 2017 IEEE International Conference on Robotics and Automation, 2017

2015

Information-theoretic occupancy grid compression for high-speed information-based exploration.

Erik Nelson, Nathan Michael

Proceedings of the 2015 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2015

Distributed real-time cooperative localization and mapping using an uncertainty-aware expectation maximization approach.

Jing Dong, Erik Nelson, Vadim Indelman, Nathan Michael, Frank Dellaert

Proceedings of the IEEE International Conference on Robotics and Automation, 2015

2014

An Experimental Study of Robust Distributed Multi-robot Data Association from Arbitrary Poses.

Erik Nelson, Vadim Indelman, Nathan Michael, Frank Dellaert

Proceedings of the Experimental Robotics, 2014

Multi-robot pose graph localization and data association from unknown initial relative poses via expectation maximization.

Vadim Indelman, Erik Nelson, Nathan Michael, Frank Dellaert

Proceedings of the 2014 IEEE International Conference on Robotics and Automation, 2014

2011

A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte On-Chip L3 Cache.

John Barth, Don Plass, Erik Nelson, Charlie Hwang, Gregory Fredeman, Michael A. Sperling, Abraham Mathews, Toshiaki Kirihata, William R. Reohr, Kavita Nair, Nianzheng Cao

IEEE J. Solid State Circuits, 2011

2010

A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cache.

John Barth, Don Plass, Erik Nelson, Charlie Hwang, Gregory Fredeman, Michael A. Sperling, Abraham Mathews, William R. Reohr, Kavita Nair, Nianzheng Cao

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Managing speed in inclement conditions using an in-vehicle interface.

Jane Barrow, David Cades, David Kidd, Erik Nelson, Daniel Roberts

Proceedings of 2nd International Conference on Automotive User Interfaces and Interactive Vehicular Applications, 2010

2009

A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS.

Peter J. Klim, John Barth, William R. Reohr, David Dick, Gregory Fredeman, Gary Koch, Hien M. Le, Aditya Khargonekar, Pamela Wilcox, John Golz, Jente B. Kuang, Abraham Mathews, Jethro C. Law, Trong Luong, Hung C. Ngo, Ryan Freese, Hillery C. Hunter, Erik Nelson, Paul C. Parries, Toshiaki Kirihata, Subramanian S. Iyer

IEEE J. Solid State Circuits, 2009

2008

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM.

Jente B. Kuang, Abraham Mathews, John Barth, Fadi H. Gebara, Tuyet Nguyen, Jeremy D. Schaub, Kevin J. Nowka, Gary D. Carpenter, Don Plass, Erik Nelson, Ivan Vo, William R. Reohr, Toshiaki Kirihata

Proceedings of the ESSCIRC 2008, 2008

2006

That cloud game: dreaming (and doing) innovative game design.

Tracy Fullerton, Jenova Chen, Kellee Santiago, Erik Nelson, Vincent Diamante, Aaron Meyers, Glenn Song, John DeWeese

Proceedings of the 2006 ACM SIGGRAPH symposium on Videogames, 2006

2005

A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipelining.

John E. Barth Jr., Darren Anand, Steve Burns, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Michael R. Nelms, Erik Nelson, Adrian Paparelli, Gary Pomichter, Dale E. Pontius, Stephen Sliva

IEEE J. Solid State Circuits, 2005