Erik DeBenedictis

Orcid: 0000-0001-6079-4787

According to our database1, Erik DeBenedictis authored at least 68 papers between 1982 and 2022.

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Bibliography

2022
Scalable Energy-Efficient Microarchitectures With Computational Error Tolerance Via Redundant Residue Number Systems.
IEEE Trans. Computers, 2022

Rebooting Quantum Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2022

2021
SortCache: Intelligent Cache Management for Accelerating Sparse Data Workloads.
ACM Trans. Archit. Code Optim., 2021

2020
MetaStrider: Architectures for Scalable Memory-centric Reduction of Sparse Data Streams.
ACM Trans. Archit. Code Optim., 2020

Quantum Access.
Computer, 2020

The Quantum Moonshot.
Computer, 2020

Beyond Quantum Supremacy.
Computer, 2020

Adiabatic Circuits for Quantum Computer Control.
Proceedings of the International Conference on Rebooting Computing, 2020

Imagining the Future of Quantum Computing.
Proceedings of the Unimagined Futures - ICT Opportunities and Challenges, 2020

2019
Quantum Computer Control using Novel, Hybrid Semiconductor-Superconductor Electronics.
CoRR, 2019

Thermodynamic Computing.
CoRR, 2019

Quantum Realism.
Computer, 2019

Moore's Law: A Hard Act to Follow.
Computer, 2019

Powerball and Quantum Supremacy.
Computer, 2019

2018
Extending Moore's Law via Computationally Error-Tolerant Computing.
ACM Trans. Archit. Code Optim., 2018

Quantum Computer Scale-up.
Computer, 2018

The National Quantum Initiative Will Also Benefit Classical Computers [Rebooting Computing].
Computer, 2018

A Role for IEEE in Quantum Computing.
Computer, 2018

Accelerated Architectures Create Programming Opportunities.
Computer, 2018

A Future with Quantum Machine Learning.
Computer, 2018

Rebooting Computers to Avoid Meltdown and Spectre.
Computer, 2018

Merge Network for a Non-Von Neumann Accumulate Accelerator in a 3D Chip.
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018

Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017
Architectures for the Post-Moore Era.
IEEE Micro, 2017

Challenges to Keeping the Computer Industry Centered in the US.
CoRR, 2017

The Opportunities and Controversies of Reversible Computing.
Computer, 2017

Sustaining Moore's Law with 3D Chips.
Computer, 2017

Plotting a Socially Responsible Course for Computers Using Cybersecurity as an Example.
Computer, 2017

3D Software: A New Research Imperative.
Computer, 2017

Computer Design Starts Over.
Computer, 2017

Computer Architecture's Changing Role in Rebooting Computing.
Computer, 2017

It's Time to Redefine Moore's Law Again.
Computer, 2017

Rebooting Computing: The Road Ahead.
Computer, 2017

On the energy consequences of information for spacecraft systems.
Proceedings of the 2017 IEEE International Conference on Wireless for Space and Extreme Environments, 2017

The Superstrider Architecture: Integrating Logic and Memory Towards Non-Von Neumann Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

Superstrider associative array architecture: Approved for unlimited unclassified release: SAND2017-7089 C.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

2016
Help Wanted: A Modern-Day Turing.
Computer, 2016

Computational Complexity and New Computing Approaches.
Computer, 2016

The Search for Computing's Secretariat.
Computer, 2016

Rebooting Computers as Learning Machines.
Computer, 2016

The Boolean Logic Tax.
Computer, 2016

A novel operational paradigm for thermodynamically reversible logic: Adibatic transformation of chaotic nonlinear dynamical circuits.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

Computationally-redundant energy-efficient processing for y'all (CREEPY).
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

A path toward ultra-low-energy computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

Energy efficiency limits of logic and memory.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

2015
Rebooting Computing: New Strategies for Technology Scaling.
Computer, 2015

Optimal adiabatic scaling and the processor-in-memory-and-storage architecture (OAS+PIMS).
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

Training neural hardware with noisy components.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

Rebooting Computing and Low-Power Image Recognition Challenge.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014
Memristors as Synapses in Artificial Neural Networks: Biomimicry Beyond Weight Change.
Proceedings of the Cybersecurity Systems for Human Cognition Augmentation, 2014

2010
High throughput and low power dissipation in QCA pipelines using Bennett clocking.
Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010

2007
General floorplan for reversible quantum-dot cellular automata.
Proceedings of the 4th Conference on Computing Frontiers, 2007

2006
M06 - Issues for the future of supercomputing: impact of Moore's law and architecture on application performance.
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006

Exotic technologies I - HPC computational systems of 2020.
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006

2005
Architectural specification for massively parallel computers: an experience and measurement-based approach.
Concurr. Pract. Exp., 2005

Reversible logic for supercomputing.
Proceedings of the Second Conference on Computing Frontiers, 2005

2004
Will Moore's Law Be Sufficient?
Proceedings of the ACM/IEEE SC2004 Conference on High Performance Networking and Computing, 2004

1995
YADDES: a novel algorithm for deadlock-free distributed discrete-event simulation.
Int. J. Comput. Simul., 1995

1993
Modular Scalable I/O.
J. Parallel Distributed Comput., 1993

Extending Unix for Scalable Computing.
Computer, 1993

I/O for TFLOPS Supercomputers.
Proceedings of the Sixth SIAM Conference on Parallel Processing for Scientific Computing, 1993

1991
A Novel Algorithm for Discrete-Event Simulation: Asynchronous Distributed Discrete-Event Simulation Algorithm for Cyclic Circuits Using A Dataflow Network.
Computer, 1991

A provably correct, non-deadlocking parallel event simulation algorithm.
Proceedings of the Proceedings 24th Annual Simulation Symposium (ANSS-24 1991), 1991

1988
Distributed programs and subroutines for multiprocessors.
Proceedings of the Third Conference on Hypercube Concurrent Computers and Applications, 1988

Multiprocessor architectures are converging.
Proceedings of the Third Conference on Hypercube Concurrent Computers and Applications, 1988

1987
A multiprocessor using protocol-based programming primitives.
Int. J. Parallel Program., 1987

1982
Techniques for Testing Integrated Circuits.
PhD thesis, 1982

Testing and Structured Design.
Proceedings of the Proceedings International Test Conference 1982, 1982


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