Erich Gornik

Orcid: 0000-0001-5371-7935

Affiliations:
  • Vienna University of Technology, Faculty of Electrical Engineering and Information Technology, Austria


According to our database1, Erich Gornik authored at least 17 papers between 2001 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2011
Application of transient interferometric mapping method for ESD and latch-up analysis.
Microelectron. Reliab., 2011

2010
Single pulse energy capability and failure modes of n- and p-channel LDMOS with thick copper metallization.
Microelectron. Reliab., 2010

2009
Transient interferometric mapping of carrier plasma during external transient latch-up phenomena in latch-up test structures and I/O cells processed in CMOS technology.
Microelectron. Reliab., 2009

Thermal imaging of smart power DMOS transistors in the thermally unstable regime using a compact transient interferometric mapping system.
Microelectron. Reliab., 2009

2007
Backside interferometric methods for localization of ESD-induced leakage current and metal shorts.
Microelectron. Reliab., 2007

2006
Analysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-up.
Microelectron. Reliab., 2006

2005
Scanning heterodyne interferometer setup for the time-resolved thermal and free-carrier mapping in semiconductor devices.
IEEE Trans. Instrum. Meas., 2005

Automated setup for thermal imaging and electrical degradation study of power DMOS devices.
Microelectron. Reliab., 2005

2004
Multiple-time-instant 2D thermal mapping during a single ESD event.
Microelectron. Reliab., 2004

Transient interferometric mapping of smart power SOI ESD protection devices under TLP and vf-TLP stress.
Microelectron. Reliab., 2004

2003
A dual-beam Michelson interferometer for investigation of trigger dynamics in ESD protection devices under very fast TLP stress.
Microelectron. Reliab., 2003

Study of internal behavior in a vertical DMOS transistor under short high current stress by an interferometric mapping method.
Microelectron. Reliab., 2003

2002
Device Simulation and Backside Laser Interferometry--Powerful Tools for ESD Protection Development.
Microelectron. Reliab., 2002

Electrical field mapping in InGaP HEMTs and GaAs terahertz emitters using backside infrared OBIC technique.
Microelectron. Reliab., 2002

Experimental and simulation analysis of a BCD ESD protection element under the DC and TLP stress conditions.
Microelectron. Reliab., 2002

2001
Effect of pulse risetime on trigger homogeneity in single finger grounded gate nMOSFET electrostatic discharge protection devices.
Microelectron. Reliab., 2001

Thermal and free carrier laser interferometric mapping and failure analysis of anti-serial smart power ESD protection structures.
Microelectron. Reliab., 2001


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