Eric P. Pepin
According to our database1,
Eric P. Pepin
authored at least 5 papers
between 2011 and 2020.
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Bibliography
2020
A Single-Chip Bidirectional Neural Interface With High-Voltage Stimulation and Adaptive Artifact Cancellation in Standard CMOS.
IEEE J. Solid State Circuits, 2020
2016
A high-voltage compliant, electrode-invariant neural stimulator front-end in 65nm bulk-CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2014
High-voltage compliant, capacitive-load invariant neural stimulation electronics compatible with standard bulk-CMOS integration.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
2012
Proceedings of the Multimedia on Mobile Devices 2012; and Multimedia Content Access: Algorithms and Systems VI, 2012
2011
Proceedings of the IEEE International Conference on Computer Vision Workshops, 2011