Eric Nestler
According to our database1,
Eric Nestler
authored at least 2 papers
between 2018 and 2019.
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Bibliography
2019
A 64-Tile 2.4-Mb In-Memory-Computing CNN Accelerator Employing Charge-Domain Compute.
IEEE J. Solid State Circuits, 2019
2018
A Mixed-Signal Binarized Convolutional-Neural-Network Accelerator Integrating Dense Weight Storage and Multiplication for Reduced Data Movement.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018