Eric Naviasky

According to our database, Eric Naviasky authored at least 18 papers between 2002 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Multi-standard low-power DDR I/O circuit design in 7nm CMOS process.

Moo Sung Chae, Tom Wilson, Eric Naviasky

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Session 11 - Wireline building blocks.

Eric Naviasky, Mohammad Hekmat

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2014

Amplifiers and filters.

Eric Naviasky, Ken Suyama

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

Oversampled ADC's.

Eric Naviasky, Hasnain Lakdawala

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

Analog techniques II.

Hasnain Lakdawala, Eric Naviasky

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

High-speed data converters.

Eric Naviasky, Mohammad Ranjbar

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2010

An energy-efficient ring-oscillator digital PLL.

John Crossley, Eric Naviasky, Elad Alon

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009

Nyquist rate ADCs.

Eric Naviasky, Ron Kapusta

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

A 12-b 56MS/s pipelined ADC in 65nm CMOS.

Adrian Leuciuc, William Evans, Honghao Ji, Eric Naviasky, Xinhua He

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2006

Tomorrow's analog: just dead or just different?

Shekhar Borkar, Robert W. Brodersen, Jue-Hsien Chern, Eric Naviasky, D. Saias, Charles G. Sodini

Proceedings of the 43rd Design Automation Conference, 2006

2005

A time-delay jitter-insensitive continuous-time bandpass ΔΣ modulator architecture.

Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon

IEEE Trans. Circuits Syst. II Express Briefs, 2005

Circuits and systems for high-speed links.

Amjad Obeidat, Eric Naviasky

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

An improved wideband PLL with adaptive frequency response that tracks the reference.

Mike Hufford, Eric Naviasky, Stephen Williams, Michelle Williams

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

An improved CMOS ring oscillator PLL with less than 4ps RMS accumulated jitter.

Stephen Williams, Hugh Thompson, Mike Hufford, Eric Naviasky

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

A low-voltage low-power sigma-delta modulator with improved performance in overload condition.

Hugh Thompson, Mike Hufford, William Evans, Eric Naviasky

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

Continuous-time, frequency translating, bandpass delta-sigma modulator.

Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 62.5 Gb/s multi-standard SerDes IC.

Hamid Partovi, Bill Evans, Tom Wilson, Scott Shelton, Eric Naviasky, Ethiraj Sanjeevi, Yongli Wen, Karthik Gopalakrishnan, Sivaraman Chokalingam, Hugh Thompson, Mike Casas, Lingting Ye, Mike Hufford, Yujing Qiu, Michelle Williams, Jared James, Alberto Baldisserotto, Steven White, Steve Williams, Domenic Georgantas, Tom Gray

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

An 852×600 pixel OLED-on-silicon color microdisplay using CMOS subthreshold-voltage-scaling current drivers.

Gary B. Levy, William Evans, John Ebner, Patrick Farrell, Mike Hufford, Bryan H. Allison, David Wheeler, Haiqing Lin, Olivier Prache, Eric Naviasky

IEEE J. Solid State Circuits, 2002