Éric Larouche

According to our database1, Éric Larouche authored at least 2 papers between 2004 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
A 2005 review of FPGA arithmetic (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004
A new bit-serial multiplier architecture for area-efficient fpga implementation.
Proceedings of the Second IASTED International Conference on Circuits, 2004


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