Eric Hao

According to our database, Eric Hao authored at least 9 papers between 1993 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto's ET-SoC-1 Chip.

David R. Ditzel, Roger Espasa, Nivard Aymerich, Allen Baum, Tom Berg, Jim Burr, Eric Hao, Jayesh Iyer, Miquel Izquierdo, Shankar Jayaratnam, Darren Jones, Chris Klingner, Jin Kim, Stephen Lee, Marc Lupon, Grigorios Magklis, Bojan Maric, Rajib Nath, Mike Neilly, J. Duane Northcutt, Bill Orner, Jose Renau, Gerard Reves, Xavier Reves, Tom Riordan, Pedro Sanchez, Sridhar Samudrala, Guillem Sole, Raymond Tang, Tommy Thorn, Francisco Torres, Sebastia Tortella, Daniel Yau

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

1998

Increasing the Instruction Fetch Rate via Block-Structured Instruction Set Architectures.

Eric Hao, Po-Yung Chang, Marius Evers, Yale N. Patt

Int. J. Parallel Program., 1998

1997

Block enlargement optimizations for increasing the instruction fetch rate in block-structured instruction set architectures.

Eric Hao

PhD thesis, 1997

Target Prediction for Indirect Jumps.

Po-Yung Chang, Eric Hao, Yale N. Patt

Proceedings of the 24th International Symposium on Computer Architecture, 1997

1996

Branch Classification: New Mechanism for Improving Branch Predictor Performance.

Po-Yung Chang, Eric Hao, Tse-Yu Yeh, Yale N. Patt

Int. J. Parallel Program., 1996

Using Predicated Execution to Improve the Performance of a Dynamically Scheduled Machine with Speculative Execution.

Po-Yung Chang, Eric Hao, Yale N. Patt, Pohua P. Chang

Int. J. Parallel Program., 1996

1995

Alternative implementations of hybrid branch predictors.

Po-Yung Chang, Eric Hao, Yale N. Patt

Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995

1994

The effect of speculatively updating branch history on branch prediction accuracy, revisited.

Eric Hao, Po-Yung Chang, Yale N. Patt

Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994

1993

KSR 1 Multiprocessor: Analysis of Latency Hiding Techniques in a Sparse Solver.

Daniel Windheiser, Eric L. Boyd, Eric Hao, Santosh G. Abraham, Edward S. Davidson

Proceedings of the Seventh International Parallel Processing Symposium, 1993